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authorAlex Waterman <alexw@nvidia.com>2017-06-07 20:32:56 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-08-04 17:54:32 -0400
commit1da69dd8b2c60a11e112844dd4e9636a913a99a0 (patch)
tree56e6912518e205b1e999881cb02f7fa504878846 /drivers/gpu/nvgpu/include
parent192cf8c1f8d1005ab08619c9152d514dec3a34ef (diff)
gpu: nvgpu: Remove mm.get_iova_addr
Remove the mm.get_iova_addr() HAL and replace it with a new HAL called mm.gpu_phys_addr(). This new HAL provides the real phys address that should be passed to the GPU from a physical address obtained from a scatter list. It also provides a mechanism by which the HAL code can add extra bits to a GPU physical address based on the attributes passed in. This is necessary during GMMU page table programming. Also remove the flags argument from the various address functions. This flag was used for adding an IO coherence bit to the GPU physical address which is not supported. JIRA NVGPU-30 Change-Id: I69af5b1c6bd905c4077c26c098fac101c6b41a33 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1530864 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/linux/nvgpu_mem.h4
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h3
2 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/linux/nvgpu_mem.h b/drivers/gpu/nvgpu/include/nvgpu/linux/nvgpu_mem.h
index 9c52811e..e2d4d336 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/linux/nvgpu_mem.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/linux/nvgpu_mem.h
@@ -19,9 +19,11 @@
19 19
20struct page; 20struct page;
21struct sg_table; 21struct sg_table;
22struct scatterlist;
22 23
23struct gk20a; 24struct gk20a;
24struct nvgpu_mem; 25struct nvgpu_mem;
26struct nvgpu_gmmu_attrs;
25 27
26struct nvgpu_mem_priv { 28struct nvgpu_mem_priv {
27 struct page **pages; 29 struct page **pages;
@@ -29,6 +31,8 @@ struct nvgpu_mem_priv {
29 unsigned long flags; 31 unsigned long flags;
30}; 32};
31 33
34u64 nvgpu_mem_get_addr_sgl(struct gk20a *g, struct scatterlist *sgl);
35
32/** 36/**
33 * __nvgpu_mem_create_from_pages - Create an nvgpu_mem from physical pages. 37 * __nvgpu_mem_create_from_pages - Create an nvgpu_mem from physical pages.
34 * 38 *
diff --git a/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h
index 4259d40f..63439e6f 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_mem.h
@@ -27,6 +27,7 @@ struct sg_table;
27 27
28struct gk20a; 28struct gk20a;
29struct nvgpu_allocator; 29struct nvgpu_allocator;
30struct nvgpu_gmmu_attrs;
30 31
31/* 32/*
32 * Real location of a buffer - nvgpu_aperture_mask() will deduce what will be 33 * Real location of a buffer - nvgpu_aperture_mask() will deduce what will be
@@ -180,6 +181,8 @@ void nvgpu_mem_wr_n(struct gk20a *g, struct nvgpu_mem *mem, u32 offset,
180void nvgpu_memset(struct gk20a *g, struct nvgpu_mem *mem, u32 offset, 181void nvgpu_memset(struct gk20a *g, struct nvgpu_mem *mem, u32 offset,
181 u32 c, u32 size); 182 u32 c, u32 size);
182 183
184u64 nvgpu_mem_get_addr(struct gk20a *g, struct nvgpu_mem *mem);
185
183u32 __nvgpu_aperture_mask(struct gk20a *g, enum nvgpu_aperture aperture, 186u32 __nvgpu_aperture_mask(struct gk20a *g, enum nvgpu_aperture aperture,
184 u32 sysmem_mask, u32 vidmem_mask); 187 u32 sysmem_mask, u32 vidmem_mask);
185u32 nvgpu_aperture_mask(struct gk20a *g, struct nvgpu_mem *mem, 188u32 nvgpu_aperture_mask(struct gk20a *g, struct nvgpu_mem *mem,