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authorSeema Khowala <seemaj@nvidia.com>2017-03-21 13:00:44 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-03-28 12:39:13 -0400
commit1bce980d09995947ff59b6d7f39cfaff51a70c74 (patch)
tree4d0ad1e516ac800c9edb6bfdb8d6844a6b1d2180 /drivers/gpu/nvgpu/include
parentb076c349b26a471776b8c487a702f791e13fb3a4 (diff)
gpu: nvgpu: gv11b: init and implement reset_enable_hw
-implement gv11b specific reset_enable_hw fifo ops -timeout period in fifo_fb_timeout_r() is set to init instead of max This register specifies the number of microseconds Host should wait for a response from FB before initiating a timeout interrupt. For bringup, this value should be set to a lower value than usual, such as ~.5 milliseconds (500), to help find out bugs in the memory subsystem. -timeout period in pbdma_timeout_r() is set to init instead of max This register contains a value used for detecting timeouts. The timeout value is in microsecond ticks. The timeouts that use this value are: GPfifo fetch timeouts to FB for acks, reqs, rdats. PBDMA connection to LB. GPfifo processor timeouts to FB for acks, reqs, rdats. Method processor timeouts to FB for acks, reqs, rdats. The init value is changed to 64K us based on bug 1816557. JIRA GPUT19X-74 JIRA GPUT19X-47 Change-Id: I6f818e129c3ea67571d206c5e735607cbfcf6ec6 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1325352 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fifo_gv11b.h4
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h16
2 files changed, 20 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fifo_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fifo_gv11b.h
index 911efa43..b9249128 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fifo_gv11b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fifo_gv11b.h
@@ -298,6 +298,10 @@ static inline u32 fifo_fb_timeout_period_max_f(void)
298{ 298{
299 return 0x3fffffff; 299 return 0x3fffffff;
300} 300}
301static inline u32 fifo_fb_timeout_period_init_f(void)
302{
303 return 0x3c00;
304}
301static inline u32 fifo_sched_disable_r(void) 305static inline u32 fifo_sched_disable_r(void)
302{ 306{
303 return 0x00002630; 307 return 0x00002630;
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h
index 9c2ba7c6..ed63cebc 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h
@@ -618,4 +618,20 @@ static inline u32 pbdma_set_channel_info_veid_f(u32 v)
618{ 618{
619 return (v & 0x3f) << 8; 619 return (v & 0x3f) << 8;
620} 620}
621static inline u32 pbdma_timeout_r(u32 i)
622{
623 return 0x0004012c + i*8192;
624}
625static inline u32 pbdma_timeout_period_m(void)
626{
627 return 0xffffffff << 0;
628}
629static inline u32 pbdma_timeout_period_max_f(void)
630{
631 return 0xffffffff;
632}
633static inline u32 pbdma_timeout_period_init_f(void)
634{
635 return 0x10000;
636}
621#endif 637#endif