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authorDebarshi Dutta <ddutta@nvidia.com>2018-06-26 06:11:12 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-04 10:25:41 -0400
commit16ad9f537979c5f3717fc5781b1c2fad22a76f96 (patch)
tree2a150c50983180051fa5ecc942764e081961d787 /drivers/gpu/nvgpu/include
parentf125d1b681c324d5d58abcc42fac1301e1faa921 (diff)
gpu: nvgpu: move gp106 specific clk_arbiter code into HAL
Currently, clock arbiter code is extensively using dgpu specific implementation. This patch restructures the clk_arbiter code and moves gp106 specific code into HAL. Following changes are made in this patch 1) clk_domain_get_f_points is now invoked via HAL for gp106 i.e. g->ops.clk.clk_domain_get_f_points. 2) moved nvgpu_clk_arb_change_vf_point and other related static functions to clk_arb_gp106.c. 3) Instead of only checking if get_arbiter_clk_domain is empty, a check for support_clk_freq_controller is also added. This is to enable the clk_arbiter based on support from both the OS and the chips. Bug 2061372 Change-Id: I65b0a4e02145a86fbbfb420ed591b1fa3c86f6dc Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1774279 Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/clk_arb.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h b/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h
index 328e03b5..e63545df 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/clk_arb.h
@@ -287,6 +287,10 @@ nvgpu_clk_arb_work_item_from_worker_item(struct nvgpu_list_node *node)
287void nvgpu_clk_arb_worker_enqueue(struct gk20a *g, 287void nvgpu_clk_arb_worker_enqueue(struct gk20a *g,
288 struct nvgpu_clk_arb_work_item *work_item); 288 struct nvgpu_clk_arb_work_item *work_item);
289 289
290int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb);
291
292int nvgpu_clk_arb_worker_init(struct gk20a *g);
293
290int nvgpu_clk_arb_init_arbiter(struct gk20a *g); 294int nvgpu_clk_arb_init_arbiter(struct gk20a *g);
291 295
292int nvgpu_clk_arb_get_arbiter_clk_range(struct gk20a *g, u32 api_domain, 296int nvgpu_clk_arb_get_arbiter_clk_range(struct gk20a *g, u32 api_domain,
@@ -338,12 +342,20 @@ void nvgpu_clk_arb_pstate_change_lock(struct gk20a *g, bool lock);
338 342
339void nvgpu_clk_arb_send_thermal_alarm(struct gk20a *g); 343void nvgpu_clk_arb_send_thermal_alarm(struct gk20a *g);
340 344
345void nvgpu_clk_arb_set_global_alarm(struct gk20a *g, u32 alarm);
346
341void nvgpu_clk_arb_schedule_alarm(struct gk20a *g, u32 alarm); 347void nvgpu_clk_arb_schedule_alarm(struct gk20a *g, u32 alarm);
342 348
349void nvgpu_clk_arb_clear_global_alarm(struct gk20a *g, u32 alarm);
350
343void nvgpu_clk_arb_free_session(struct nvgpu_ref *refcount); 351void nvgpu_clk_arb_free_session(struct nvgpu_ref *refcount);
344 352
345void nvgpu_clk_arb_free_fd(struct nvgpu_ref *refcount); 353void nvgpu_clk_arb_free_fd(struct nvgpu_ref *refcount);
346 354
355u32 nvgpu_clk_arb_notify(struct nvgpu_clk_dev *dev,
356 struct nvgpu_clk_arb_target *target,
357 u32 alarm);
358
347int nvgpu_clk_notification_queue_alloc(struct gk20a *g, 359int nvgpu_clk_notification_queue_alloc(struct gk20a *g,
348 struct nvgpu_clk_notification_queue *queue, 360 struct nvgpu_clk_notification_queue *queue,
349 size_t events_number); 361 size_t events_number);