diff options
author | Seema Khowala <seemaj@nvidia.com> | 2017-06-20 18:31:46 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-06-29 16:29:41 -0400 |
commit | 11009e0e69a497780ddb918fab89da62089510ce (patch) | |
tree | d9b7e873f298205f7288c5faad352ae5805c8e68 /drivers/gpu/nvgpu/include | |
parent | 7681d6b007755e16f55951a1491a38faff8c72e9 (diff) |
gpu: nvgpu: gv11b: sm register changes
gv11b has multiple SMs and SM register addresses
have changed as compared to legacy chips.
JIRA GPUT19X-75
Change-Id: I2319f4c78f3efda3430bab1f5ecf1a068e57a1ca
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master/r/1506013
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h | 318 |
1 files changed, 165 insertions, 153 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h index 75a64be5..daa4c08a 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h | |||
@@ -174,6 +174,10 @@ static inline u32 gr_exception_ds_m(void) | |||
174 | { | 174 | { |
175 | return 0x1 << 4; | 175 | return 0x1 << 4; |
176 | } | 176 | } |
177 | static inline u32 gr_exception_sked_m(void) | ||
178 | { | ||
179 | return 0x1 << 8; | ||
180 | } | ||
177 | static inline u32 gr_exception1_r(void) | 181 | static inline u32 gr_exception1_r(void) |
178 | { | 182 | { |
179 | return 0x00400118; | 183 | return 0x00400118; |
@@ -966,14 +970,82 @@ static inline u32 gr_fe_hww_esr_en_enable_f(void) | |||
966 | { | 970 | { |
967 | return 0x80000000; | 971 | return 0x80000000; |
968 | } | 972 | } |
969 | static inline u32 gr_gpcs_tpcs_sms_hww_warp_esr_report_mask_r(void) | ||
970 | { | ||
971 | return 0x00419ea8; | ||
972 | } | ||
973 | static inline u32 gr_gpcs_tpcs_sms_hww_global_esr_report_mask_r(void) | 973 | static inline u32 gr_gpcs_tpcs_sms_hww_global_esr_report_mask_r(void) |
974 | { | 974 | { |
975 | return 0x00419eac; | 975 | return 0x00419eac; |
976 | } | 976 | } |
977 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_report_mask_r(void) | ||
978 | { | ||
979 | return 0x0050472c; | ||
980 | } | ||
981 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_report_mask_multiple_warp_errors_report_f(void) | ||
982 | { | ||
983 | return 0x4; | ||
984 | } | ||
985 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_report_mask_bpt_int_report_f(void) | ||
986 | { | ||
987 | return 0x10; | ||
988 | } | ||
989 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_report_mask_bpt_pause_report_f(void) | ||
990 | { | ||
991 | return 0x20; | ||
992 | } | ||
993 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_report_mask_single_step_complete_report_f(void) | ||
994 | { | ||
995 | return 0x40; | ||
996 | } | ||
997 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_report_mask_error_in_trap_report_f(void) | ||
998 | { | ||
999 | return 0x100; | ||
1000 | } | ||
1001 | static inline u32 gr_gpcs_tpcs_sms_hww_global_esr_r(void) | ||
1002 | { | ||
1003 | return 0x00419eb4; | ||
1004 | } | ||
1005 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_r(void) | ||
1006 | { | ||
1007 | return 0x00504734; | ||
1008 | } | ||
1009 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_bpt_int_m(void) | ||
1010 | { | ||
1011 | return 0x1 << 4; | ||
1012 | } | ||
1013 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_bpt_int_pending_f(void) | ||
1014 | { | ||
1015 | return 0x10; | ||
1016 | } | ||
1017 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_bpt_pause_m(void) | ||
1018 | { | ||
1019 | return 0x1 << 5; | ||
1020 | } | ||
1021 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_bpt_pause_pending_f(void) | ||
1022 | { | ||
1023 | return 0x20; | ||
1024 | } | ||
1025 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_single_step_complete_m(void) | ||
1026 | { | ||
1027 | return 0x1 << 6; | ||
1028 | } | ||
1029 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_single_step_complete_pending_f(void) | ||
1030 | { | ||
1031 | return 0x40; | ||
1032 | } | ||
1033 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_multiple_warp_errors_m(void) | ||
1034 | { | ||
1035 | return 0x1 << 2; | ||
1036 | } | ||
1037 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_multiple_warp_errors_pending_f(void) | ||
1038 | { | ||
1039 | return 0x4; | ||
1040 | } | ||
1041 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_error_in_trap_m(void) | ||
1042 | { | ||
1043 | return 0x1 << 8; | ||
1044 | } | ||
1045 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_error_in_trap_pending_f(void) | ||
1046 | { | ||
1047 | return 0x100; | ||
1048 | } | ||
977 | static inline u32 gr_fe_go_idle_timeout_r(void) | 1049 | static inline u32 gr_fe_go_idle_timeout_r(void) |
978 | { | 1050 | { |
979 | return 0x00404154; | 1051 | return 0x00404154; |
@@ -2422,6 +2494,22 @@ static inline u32 gr_sked_hww_esr_reset_active_f(void) | |||
2422 | { | 2494 | { |
2423 | return 0x40000000; | 2495 | return 0x40000000; |
2424 | } | 2496 | } |
2497 | static inline u32 gr_sked_hww_esr_en_r(void) | ||
2498 | { | ||
2499 | return 0x00407024; | ||
2500 | } | ||
2501 | static inline u32 gr_sked_hww_esr_en_skedcheck18_l1_config_too_small_m(void) | ||
2502 | { | ||
2503 | return 0x1 << 25; | ||
2504 | } | ||
2505 | static inline u32 gr_sked_hww_esr_en_skedcheck18_l1_config_too_small_disabled_f(void) | ||
2506 | { | ||
2507 | return 0x0; | ||
2508 | } | ||
2509 | static inline u32 gr_sked_hww_esr_en_skedcheck18_l1_config_too_small_enabled_f(void) | ||
2510 | { | ||
2511 | return 0x2000000; | ||
2512 | } | ||
2425 | static inline u32 gr_cwd_fs_r(void) | 2513 | static inline u32 gr_cwd_fs_r(void) |
2426 | { | 2514 | { |
2427 | return 0x00405b00; | 2515 | return 0x00405b00; |
@@ -3302,90 +3390,74 @@ static inline u32 gr_gpcs_tpcs_mpc_vtg_cb_global_base_addr_valid_true_f(void) | |||
3302 | { | 3390 | { |
3303 | return 0x10000000; | 3391 | return 0x10000000; |
3304 | } | 3392 | } |
3305 | static inline u32 gr_gpcs_tpcs_sm0_hww_warp_esr_report_mask_r(void) | 3393 | static inline u32 gr_gpcs_tpcs_sms_hww_warp_esr_report_mask_r(void) |
3306 | { | 3394 | { |
3307 | return 0x00419f28; | 3395 | return 0x00419ea8; |
3308 | } | 3396 | } |
3309 | static inline u32 gr_gpcs_tpcs_sm0_hww_warp_esr_report_mask_stack_error_report_f(void) | 3397 | static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_report_mask_r(void) |
3398 | { | ||
3399 | return 0x00504728; | ||
3400 | } | ||
3401 | static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_report_mask_stack_error_report_f(void) | ||
3310 | { | 3402 | { |
3311 | return 0x2; | 3403 | return 0x2; |
3312 | } | 3404 | } |
3313 | static inline u32 gr_gpcs_tpcs_sm0_hww_warp_esr_report_mask_api_stack_error_report_f(void) | 3405 | static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_report_mask_api_stack_error_report_f(void) |
3314 | { | 3406 | { |
3315 | return 0x4; | 3407 | return 0x4; |
3316 | } | 3408 | } |
3317 | static inline u32 gr_gpcs_tpcs_sm0_hww_warp_esr_report_mask_pc_wrap_report_f(void) | 3409 | static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_report_mask_pc_wrap_report_f(void) |
3318 | { | 3410 | { |
3319 | return 0x10; | 3411 | return 0x10; |
3320 | } | 3412 | } |
3321 | static inline u32 gr_gpcs_tpcs_sm0_hww_warp_esr_report_mask_misaligned_pc_report_f(void) | 3413 | static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_report_mask_misaligned_pc_report_f(void) |
3322 | { | 3414 | { |
3323 | return 0x20; | 3415 | return 0x20; |
3324 | } | 3416 | } |
3325 | static inline u32 gr_gpcs_tpcs_sm0_hww_warp_esr_report_mask_pc_overflow_report_f(void) | 3417 | static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_report_mask_pc_overflow_report_f(void) |
3326 | { | 3418 | { |
3327 | return 0x40; | 3419 | return 0x40; |
3328 | } | 3420 | } |
3329 | static inline u32 gr_gpcs_tpcs_sm0_hww_warp_esr_report_mask_misaligned_reg_report_f(void) | 3421 | static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_report_mask_misaligned_reg_report_f(void) |
3330 | { | 3422 | { |
3331 | return 0x100; | 3423 | return 0x100; |
3332 | } | 3424 | } |
3333 | static inline u32 gr_gpcs_tpcs_sm0_hww_warp_esr_report_mask_illegal_instr_encoding_report_f(void) | 3425 | static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_report_mask_illegal_instr_encoding_report_f(void) |
3334 | { | 3426 | { |
3335 | return 0x200; | 3427 | return 0x200; |
3336 | } | 3428 | } |
3337 | static inline u32 gr_gpcs_tpcs_sm0_hww_warp_esr_report_mask_illegal_instr_param_report_f(void) | 3429 | static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_report_mask_illegal_instr_param_report_f(void) |
3338 | { | 3430 | { |
3339 | return 0x800; | 3431 | return 0x800; |
3340 | } | 3432 | } |
3341 | static inline u32 gr_gpcs_tpcs_sm0_hww_warp_esr_report_mask_oor_reg_report_f(void) | 3433 | static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_report_mask_oor_reg_report_f(void) |
3342 | { | 3434 | { |
3343 | return 0x2000; | 3435 | return 0x2000; |
3344 | } | 3436 | } |
3345 | static inline u32 gr_gpcs_tpcs_sm0_hww_warp_esr_report_mask_oor_addr_report_f(void) | 3437 | static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_report_mask_oor_addr_report_f(void) |
3346 | { | 3438 | { |
3347 | return 0x4000; | 3439 | return 0x4000; |
3348 | } | 3440 | } |
3349 | static inline u32 gr_gpcs_tpcs_sm0_hww_warp_esr_report_mask_misaligned_addr_report_f(void) | 3441 | static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_report_mask_misaligned_addr_report_f(void) |
3350 | { | 3442 | { |
3351 | return 0x8000; | 3443 | return 0x8000; |
3352 | } | 3444 | } |
3353 | static inline u32 gr_gpcs_tpcs_sm0_hww_warp_esr_report_mask_invalid_addr_space_report_f(void) | 3445 | static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_report_mask_invalid_addr_space_report_f(void) |
3354 | { | 3446 | { |
3355 | return 0x10000; | 3447 | return 0x10000; |
3356 | } | 3448 | } |
3357 | static inline u32 gr_gpcs_tpcs_sm0_hww_warp_esr_report_mask_invalid_const_addr_ldc_report_f(void) | 3449 | static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_report_mask_invalid_const_addr_ldc_report_f(void) |
3358 | { | 3450 | { |
3359 | return 0x40000; | 3451 | return 0x40000; |
3360 | } | 3452 | } |
3361 | static inline u32 gr_gpcs_tpcs_sm0_hww_warp_esr_report_mask_mmu_fault_report_f(void) | 3453 | static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_report_mask_mmu_fault_report_f(void) |
3362 | { | 3454 | { |
3363 | return 0x800000; | 3455 | return 0x800000; |
3364 | } | 3456 | } |
3365 | static inline u32 gr_gpcs_tpcs_sm0_hww_warp_esr_report_mask_stack_overflow_report_f(void) | 3457 | static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_report_mask_stack_overflow_report_f(void) |
3366 | { | 3458 | { |
3367 | return 0x400000; | 3459 | return 0x400000; |
3368 | } | 3460 | } |
3369 | static inline u32 gr_gpcs_tpcs_sm0_hww_global_esr_report_mask_r(void) | ||
3370 | { | ||
3371 | return 0x00419f2c; | ||
3372 | } | ||
3373 | static inline u32 gr_gpcs_tpcs_sm0_hww_global_esr_report_mask_multiple_warp_errors_report_f(void) | ||
3374 | { | ||
3375 | return 0x4; | ||
3376 | } | ||
3377 | static inline u32 gr_gpcs_tpcs_sm0_hww_global_esr_report_mask_bpt_int_report_f(void) | ||
3378 | { | ||
3379 | return 0x10; | ||
3380 | } | ||
3381 | static inline u32 gr_gpcs_tpcs_sm0_hww_global_esr_report_mask_bpt_pause_report_f(void) | ||
3382 | { | ||
3383 | return 0x20; | ||
3384 | } | ||
3385 | static inline u32 gr_gpcs_tpcs_sm0_hww_global_esr_report_mask_single_step_complete_report_f(void) | ||
3386 | { | ||
3387 | return 0x40; | ||
3388 | } | ||
3389 | static inline u32 gr_gpcs_tpcs_tpccs_tpc_exception_en_r(void) | 3461 | static inline u32 gr_gpcs_tpcs_tpccs_tpc_exception_en_r(void) |
3390 | { | 3462 | { |
3391 | return 0x00419d0c; | 3463 | return 0x00419d0c; |
@@ -3562,10 +3634,22 @@ static inline u32 gr_gpc0_tpc0_sm0_dbgr_control0_debugger_mode_on_v(void) | |||
3562 | { | 3634 | { |
3563 | return 0x00000001; | 3635 | return 0x00000001; |
3564 | } | 3636 | } |
3637 | static inline u32 gr_gpc0_tpc0_sm0_dbgr_control0_debugger_mode_on_f(void) | ||
3638 | { | ||
3639 | return 0x1; | ||
3640 | } | ||
3565 | static inline u32 gr_gpc0_tpc0_sm0_dbgr_control0_debugger_mode_off_v(void) | 3641 | static inline u32 gr_gpc0_tpc0_sm0_dbgr_control0_debugger_mode_off_v(void) |
3566 | { | 3642 | { |
3567 | return 0x00000000; | 3643 | return 0x00000000; |
3568 | } | 3644 | } |
3645 | static inline u32 gr_gpc0_tpc0_sm0_dbgr_control0_debugger_mode_off_f(void) | ||
3646 | { | ||
3647 | return 0x0; | ||
3648 | } | ||
3649 | static inline u32 gr_gpc0_tpc0_sm0_dbgr_control0_stop_trigger_m(void) | ||
3650 | { | ||
3651 | return 0x1 << 31; | ||
3652 | } | ||
3569 | static inline u32 gr_gpc0_tpc0_sm0_dbgr_control0_stop_trigger_enable_f(void) | 3653 | static inline u32 gr_gpc0_tpc0_sm0_dbgr_control0_stop_trigger_enable_f(void) |
3570 | { | 3654 | { |
3571 | return 0x80000000; | 3655 | return 0x80000000; |
@@ -3574,6 +3658,10 @@ static inline u32 gr_gpc0_tpc0_sm0_dbgr_control0_stop_trigger_disable_f(void) | |||
3574 | { | 3658 | { |
3575 | return 0x0; | 3659 | return 0x0; |
3576 | } | 3660 | } |
3661 | static inline u32 gr_gpc0_tpc0_sm0_dbgr_control0_single_step_mode_m(void) | ||
3662 | { | ||
3663 | return 0x1 << 3; | ||
3664 | } | ||
3577 | static inline u32 gr_gpc0_tpc0_sm0_dbgr_control0_single_step_mode_enable_f(void) | 3665 | static inline u32 gr_gpc0_tpc0_sm0_dbgr_control0_single_step_mode_enable_f(void) |
3578 | { | 3666 | { |
3579 | return 0x8; | 3667 | return 0x8; |
@@ -3590,17 +3678,37 @@ static inline u32 gr_gpc0_tpc0_sm0_warp_valid_mask_r(void) | |||
3590 | { | 3678 | { |
3591 | return 0x00504708; | 3679 | return 0x00504708; |
3592 | } | 3680 | } |
3681 | static inline u32 gr_gpc0_tpc0_sm0_warp_valid_mask_1_r(void) | ||
3682 | { | ||
3683 | return 0x0050470c; | ||
3684 | } | ||
3593 | static inline u32 gr_gpc0_tpc0_sm0_dbgr_bpt_pause_mask_r(void) | 3685 | static inline u32 gr_gpc0_tpc0_sm0_dbgr_bpt_pause_mask_r(void) |
3594 | { | 3686 | { |
3595 | return 0x00504710; | 3687 | return 0x00504710; |
3596 | } | 3688 | } |
3689 | static inline u32 gr_gpc0_tpc0_sm0_dbgr_bpt_pause_mask_1_r(void) | ||
3690 | { | ||
3691 | return 0x00504714; | ||
3692 | } | ||
3597 | static inline u32 gr_gpc0_tpc0_sm0_dbgr_bpt_trap_mask_r(void) | 3693 | static inline u32 gr_gpc0_tpc0_sm0_dbgr_bpt_trap_mask_r(void) |
3598 | { | 3694 | { |
3599 | return 0x00504718; | 3695 | return 0x00504718; |
3600 | } | 3696 | } |
3601 | static inline u32 gr_gpcs_tpcs_sm0_dbgr_bpt_pause_mask_r(void) | 3697 | static inline u32 gr_gpc0_tpc0_sm0_dbgr_bpt_trap_mask_1_r(void) |
3698 | { | ||
3699 | return 0x0050471c; | ||
3700 | } | ||
3701 | static inline u32 gr_gpcs_tpcs_sms_dbgr_bpt_pause_mask_r(void) | ||
3602 | { | 3702 | { |
3603 | return 0x00419f10; | 3703 | return 0x00419e90; |
3704 | } | ||
3705 | static inline u32 gr_gpcs_tpcs_sms_dbgr_bpt_pause_mask_1_r(void) | ||
3706 | { | ||
3707 | return 0x00419e94; | ||
3708 | } | ||
3709 | static inline u32 gr_gpcs_tpcs_sms_dbgr_status0_r(void) | ||
3710 | { | ||
3711 | return 0x00419e80; | ||
3604 | } | 3712 | } |
3605 | static inline u32 gr_gpc0_tpc0_sm0_dbgr_status0_r(void) | 3713 | static inline u32 gr_gpc0_tpc0_sm0_dbgr_status0_r(void) |
3606 | { | 3714 | { |
@@ -3618,46 +3726,6 @@ static inline u32 gr_gpc0_tpc0_sm0_dbgr_status0_locked_down_true_v(void) | |||
3618 | { | 3726 | { |
3619 | return 0x00000001; | 3727 | return 0x00000001; |
3620 | } | 3728 | } |
3621 | static inline u32 gr_gpcs_tpcs_sm0_hww_global_esr_r(void) | ||
3622 | { | ||
3623 | return 0x00419f34; | ||
3624 | } | ||
3625 | static inline u32 gr_gpcs_tpcs_sm0_hww_global_esr_bpt_int_pending_f(void) | ||
3626 | { | ||
3627 | return 0x10; | ||
3628 | } | ||
3629 | static inline u32 gr_gpcs_tpcs_sm0_hww_global_esr_bpt_pause_pending_f(void) | ||
3630 | { | ||
3631 | return 0x20; | ||
3632 | } | ||
3633 | static inline u32 gr_gpcs_tpcs_sm0_hww_global_esr_single_step_complete_pending_f(void) | ||
3634 | { | ||
3635 | return 0x40; | ||
3636 | } | ||
3637 | static inline u32 gr_gpcs_tpcs_sm0_hww_global_esr_multiple_warp_errors_pending_f(void) | ||
3638 | { | ||
3639 | return 0x4; | ||
3640 | } | ||
3641 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_r(void) | ||
3642 | { | ||
3643 | return 0x00504734; | ||
3644 | } | ||
3645 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_bpt_int_pending_f(void) | ||
3646 | { | ||
3647 | return 0x10; | ||
3648 | } | ||
3649 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_bpt_pause_pending_f(void) | ||
3650 | { | ||
3651 | return 0x20; | ||
3652 | } | ||
3653 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_single_step_complete_pending_f(void) | ||
3654 | { | ||
3655 | return 0x40; | ||
3656 | } | ||
3657 | static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_multiple_warp_errors_pending_f(void) | ||
3658 | { | ||
3659 | return 0x4; | ||
3660 | } | ||
3661 | static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_r(void) | 3729 | static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_r(void) |
3662 | { | 3730 | { |
3663 | return 0x00504730; | 3731 | return 0x00504730; |
@@ -3686,6 +3754,18 @@ static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_addr_error_type_none_f(void) | |||
3686 | { | 3754 | { |
3687 | return 0x0; | 3755 | return 0x0; |
3688 | } | 3756 | } |
3757 | static inline u32 gr_gpc0_tpc0_sm_tpc_esr_sm_sel_r(void) | ||
3758 | { | ||
3759 | return 0x0050460c; | ||
3760 | } | ||
3761 | static inline u32 gr_gpc0_tpc0_sm_tpc_esr_sm_sel_sm0_error_v(u32 r) | ||
3762 | { | ||
3763 | return (r >> 0) & 0x1; | ||
3764 | } | ||
3765 | static inline u32 gr_gpc0_tpc0_sm_tpc_esr_sm_sel_sm1_error_v(u32 r) | ||
3766 | { | ||
3767 | return (r >> 1) & 0x1; | ||
3768 | } | ||
3689 | static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_pc_r(void) | 3769 | static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_pc_r(void) |
3690 | { | 3770 | { |
3691 | return 0x00504738; | 3771 | return 0x00504738; |
@@ -3958,57 +4038,9 @@ static inline u32 gr_gpcs_mmu_num_active_ltcs_r(void) | |||
3958 | { | 4038 | { |
3959 | return 0x004188ac; | 4039 | return 0x004188ac; |
3960 | } | 4040 | } |
3961 | static inline u32 gr_gpcs_tpcs_sm0_dbgr_control0_r(void) | 4041 | static inline u32 gr_gpcs_tpcs_sms_dbgr_control0_r(void) |
3962 | { | 4042 | { |
3963 | return 0x00419f04; | 4043 | return 0x00419e84; |
3964 | } | ||
3965 | static inline u32 gr_gpcs_tpcs_sm0_dbgr_control0_debugger_mode_f(u32 v) | ||
3966 | { | ||
3967 | return (v & 0x1) << 0; | ||
3968 | } | ||
3969 | static inline u32 gr_gpcs_tpcs_sm0_dbgr_control0_debugger_mode_on_v(void) | ||
3970 | { | ||
3971 | return 0x00000001; | ||
3972 | } | ||
3973 | static inline u32 gr_gpcs_tpcs_sm0_dbgr_control0_stop_trigger_m(void) | ||
3974 | { | ||
3975 | return 0x1 << 31; | ||
3976 | } | ||
3977 | static inline u32 gr_gpcs_tpcs_sm0_dbgr_control0_stop_trigger_v(u32 r) | ||
3978 | { | ||
3979 | return (r >> 31) & 0x1; | ||
3980 | } | ||
3981 | static inline u32 gr_gpcs_tpcs_sm0_dbgr_control0_stop_trigger_enable_f(void) | ||
3982 | { | ||
3983 | return 0x80000000; | ||
3984 | } | ||
3985 | static inline u32 gr_gpcs_tpcs_sm0_dbgr_control0_stop_trigger_disable_f(void) | ||
3986 | { | ||
3987 | return 0x0; | ||
3988 | } | ||
3989 | static inline u32 gr_gpcs_tpcs_sm0_dbgr_control0_single_step_mode_m(void) | ||
3990 | { | ||
3991 | return 0x1 << 3; | ||
3992 | } | ||
3993 | static inline u32 gr_gpcs_tpcs_sm0_dbgr_control0_single_step_mode_enable_f(void) | ||
3994 | { | ||
3995 | return 0x8; | ||
3996 | } | ||
3997 | static inline u32 gr_gpcs_tpcs_sm0_dbgr_control0_single_step_mode_disable_f(void) | ||
3998 | { | ||
3999 | return 0x0; | ||
4000 | } | ||
4001 | static inline u32 gr_gpcs_tpcs_sm0_dbgr_control0_run_trigger_m(void) | ||
4002 | { | ||
4003 | return 0x1 << 30; | ||
4004 | } | ||
4005 | static inline u32 gr_gpcs_tpcs_sm0_dbgr_control0_run_trigger_v(u32 r) | ||
4006 | { | ||
4007 | return (r >> 30) & 0x1; | ||
4008 | } | ||
4009 | static inline u32 gr_gpcs_tpcs_sm0_dbgr_control0_run_trigger_task_f(void) | ||
4010 | { | ||
4011 | return 0x40000000; | ||
4012 | } | 4044 | } |
4013 | static inline u32 gr_fe_gfxp_wfi_timeout_r(void) | 4045 | static inline u32 gr_fe_gfxp_wfi_timeout_r(void) |
4014 | { | 4046 | { |
@@ -4666,24 +4698,4 @@ static inline u32 gr_fecs_falcon_ecc_uncorrected_err_count_unique_total_v(u32 r) | |||
4666 | { | 4698 | { |
4667 | return (r >> 16) & 0xffff; | 4699 | return (r >> 16) & 0xffff; |
4668 | } | 4700 | } |
4669 | static inline u32 gr_sked_hww_esr_en_r(void) | ||
4670 | { | ||
4671 | return 0x00407024; | ||
4672 | } | ||
4673 | static inline u32 gr_sked_hww_esr_en_skedcheck18_l1_config_too_small_m(void) | ||
4674 | { | ||
4675 | return 0x1 << 25; | ||
4676 | } | ||
4677 | static inline u32 gr_sked_hww_esr_en_skedcheck18_l1_config_too_small_disabled_f(void) | ||
4678 | { | ||
4679 | return 0x0; | ||
4680 | } | ||
4681 | static inline u32 gr_sked_hww_esr_en_skedcheck18_l1_config_too_small_enabled_f(void) | ||
4682 | { | ||
4683 | return 0x2000000; | ||
4684 | } | ||
4685 | static inline u32 gr_exception_sked_m(void) | ||
4686 | { | ||
4687 | return 0x1 << 8; | ||
4688 | } | ||
4689 | #endif | 4701 | #endif |