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authorDeepak Nibade <dnibade@nvidia.com>2019-07-09 05:42:32 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2019-11-04 09:10:39 -0500
commit0ffc5fa5e44c623b6fde3d6bed5369b9674ee089 (patch)
tree5fcf39cd05d2128dd05837c36bdd89a24f4ac631 /drivers/gpu/nvgpu/include
parentaa43252d1a60db5d317a71787e2aee3b0d7cb8a8 (diff)
gpu: nvgpu: add clock gating support for HSHUB
Add BLCG and SLCG clock gating support for HSHUB unit on gv11b Register list for BLCG and SLCG is auto generated with scripts. Add HAL operations to enable/disable HSHUB clock gating Re-generate gv11b reglist so that all the manually commented registers are automatically deleted. Some of the unicast registers are also deleted. We already have corresponding broadcast registers present. Cherry-pick/manually port from dev-main Bug 2526212 Change-Id: I2654f158daa802bcf992e103ed4a44675aa5fd4d Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2150199 (cherry picked from commit e34b6f76d38ad5641c1ed7c3a4b36752d9dd4750) Reviewed-on: https://git-master.nvidia.com/r/2224708 Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-by: Luis Dib <ldib@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/gk20a.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
index 47a04f16..af8a868e 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2011-2019, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * GK20A Graphics 4 * GK20A Graphics
5 * 5 *
@@ -616,6 +616,7 @@ struct gpu_ops {
616 void (*slcg_pmu_load_gating_prod)(struct gk20a *g, bool prod); 616 void (*slcg_pmu_load_gating_prod)(struct gk20a *g, bool prod);
617 void (*slcg_therm_load_gating_prod)(struct gk20a *g, bool prod); 617 void (*slcg_therm_load_gating_prod)(struct gk20a *g, bool prod);
618 void (*slcg_xbar_load_gating_prod)(struct gk20a *g, bool prod); 618 void (*slcg_xbar_load_gating_prod)(struct gk20a *g, bool prod);
619 void (*slcg_hshub_load_gating_prod)(struct gk20a *g, bool prod);
619 void (*blcg_bus_load_gating_prod)(struct gk20a *g, bool prod); 620 void (*blcg_bus_load_gating_prod)(struct gk20a *g, bool prod);
620 void (*blcg_ce_load_gating_prod)(struct gk20a *g, bool prod); 621 void (*blcg_ce_load_gating_prod)(struct gk20a *g, bool prod);
621 void (*blcg_ctxsw_firmware_load_gating_prod)(struct gk20a *g, bool prod); 622 void (*blcg_ctxsw_firmware_load_gating_prod)(struct gk20a *g, bool prod);
@@ -626,6 +627,7 @@ struct gpu_ops {
626 void (*blcg_pwr_csb_load_gating_prod)(struct gk20a *g, bool prod); 627 void (*blcg_pwr_csb_load_gating_prod)(struct gk20a *g, bool prod);
627 void (*blcg_pmu_load_gating_prod)(struct gk20a *g, bool prod); 628 void (*blcg_pmu_load_gating_prod)(struct gk20a *g, bool prod);
628 void (*blcg_xbar_load_gating_prod)(struct gk20a *g, bool prod); 629 void (*blcg_xbar_load_gating_prod)(struct gk20a *g, bool prod);
630 void (*blcg_hshub_load_gating_prod)(struct gk20a *g, bool prod);
629 void (*pg_gr_load_gating_prod)(struct gk20a *g, bool prod); 631 void (*pg_gr_load_gating_prod)(struct gk20a *g, bool prod);
630 } clock_gating; 632 } clock_gating;
631 struct { 633 struct {