diff options
author | seshendra <sgadagottu@nvidia.com> | 2019-09-03 13:47:41 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2019-09-06 01:39:24 -0400 |
commit | 07ddc5aaad9a89a758cb5fe247c06d845b025e65 (patch) | |
tree | bee0c647e6e484d52c8f41971eb625c0f1db91f1 /drivers/gpu/nvgpu/include | |
parent | f57cf74d57718c672b1af8dd957cc8bd9ea3bb6c (diff) |
gpu: nvgpu: Enabling/disabling FECS trace support
- To enable FECS trace support, nvgpu should set the MSB
of the read pointer (MAILBOX1).
- The ucode will check if the feature is enabled/disabled
before writing a record into the circular buffer. If the
feature is disabled, it will not write the record.
- If the feature is enabled and the buffer is not allocated,
HW will throw a page fault error.
Bug 2459186
Bug 200542611
Change-Id: I6f181643737d1cf1bda02077eaa714a3f4ef3d8c
Signed-off-by: seshendra <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2189250
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/ctxsw_trace.h | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/enabled.h | 3 |
2 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/ctxsw_trace.h b/drivers/gpu/nvgpu/include/nvgpu/ctxsw_trace.h index 2da6b837..033e020a 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/ctxsw_trace.h +++ b/drivers/gpu/nvgpu/include/nvgpu/ctxsw_trace.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -48,6 +48,7 @@ struct channel_gk20a; | |||
48 | ((p)->tag_bits[(n) / 64] & (1 << ((n) & 63))) | 48 | ((p)->tag_bits[(n) / 64] & (1 << ((n) & 63))) |
49 | 49 | ||
50 | #define NVGPU_GPU_CTXSW_FILTER_SIZE (NVGPU_GPU_CTXSW_TAG_LAST + 1) | 50 | #define NVGPU_GPU_CTXSW_FILTER_SIZE (NVGPU_GPU_CTXSW_TAG_LAST + 1) |
51 | #define NVGPU_FECS_TRACE_FEATURE_CONTROL_BIT 31 | ||
51 | 52 | ||
52 | struct nvgpu_gpu_ctxsw_trace_filter { | 53 | struct nvgpu_gpu_ctxsw_trace_filter { |
53 | u64 tag_bits[(NVGPU_GPU_CTXSW_FILTER_SIZE + 63) / 64]; | 54 | u64 tag_bits[(NVGPU_GPU_CTXSW_FILTER_SIZE + 63) / 64]; |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/enabled.h b/drivers/gpu/nvgpu/include/nvgpu/enabled.h index 79bffcac..76f0f2bd 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/enabled.h +++ b/drivers/gpu/nvgpu/include/nvgpu/enabled.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -37,6 +37,7 @@ struct gk20a; | |||
37 | #define NVGPU_FECS_TRACE_VA 4 | 37 | #define NVGPU_FECS_TRACE_VA 4 |
38 | #define NVGPU_CAN_RAILGATE 5 | 38 | #define NVGPU_CAN_RAILGATE 5 |
39 | #define NVGPU_KERNEL_IS_DYING 6 | 39 | #define NVGPU_KERNEL_IS_DYING 6 |
40 | #define NVGPU_FECS_TRACE_FEATURE_CONTROL 7 | ||
40 | 41 | ||
41 | /* | 42 | /* |
42 | * ECC flags | 43 | * ECC flags |