diff options
author | Thomas Fleury <tfleury@nvidia.com> | 2018-01-23 17:20:43 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-02-26 00:48:24 -0500 |
commit | 0601fd25a5e01d0da638efef13c58b64f198bafb (patch) | |
tree | dbe843912a525497103bbe9beefc6e78ff67c8c9 /drivers/gpu/nvgpu/include | |
parent | 223ea4d8a179835dd5899bbc12fe78b4998b0bd7 (diff) |
gpu: nvgpu: gv100: nvlink endpoint driver
The following changes implements the initial (as per bringup) nvlink driver.
(1) SW initialization of nvlink core driver structures
(2) Nvlink interrupt handling
(3) Device initialization (IOCTRL, pll and clocks, device level intr)
(4) Falcon support for minion
(5) Minion load and bootstrapping
(6) Link initialization and DL PROD settings
(7) Device Interface init (and switching HSHUB to nvlink)
(8) HS set/get mode for both link and sublink
(9) Topology discovery and VBIOS settings.
(10) Ensures we get physical contiguous memory when Nvlink is enabled
This driver includes a hack for the current single dev/single link limitation.
JIRA: EVLR-2331
JIRA: EVLR-2330
JIRA: EVLR-2329
JIRA: EVLR-2328
Change-Id: Idca9a819179376cc655784482b24b575a52fa9e5
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1656790
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include')
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_minion_gv100.h | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/nvlink.h | 15 |
2 files changed, 18 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_minion_gv100.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_minion_gv100.h index c59a6e6b..a57ea97a 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_minion_gv100.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_minion_gv100.h | |||
@@ -892,6 +892,14 @@ static inline u32 minion_nvlink_link_intr_code_dlreq_f(void) | |||
892 | { | 892 | { |
893 | return 0x2U; | 893 | return 0x2U; |
894 | } | 894 | } |
895 | static inline u32 minion_nvlink_link_intr_code_pmdisabled_v(void) | ||
896 | { | ||
897 | return 0x00000003U; | ||
898 | } | ||
899 | static inline u32 minion_nvlink_link_intr_code_pmdisabled_f(void) | ||
900 | { | ||
901 | return 0x3U; | ||
902 | } | ||
895 | static inline u32 minion_nvlink_link_intr_subcode_f(u32 v) | 903 | static inline u32 minion_nvlink_link_intr_subcode_f(u32 v) |
896 | { | 904 | { |
897 | return (v & 0xffU) << 8U; | 905 | return (v & 0xffU) << 8U; |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/nvlink.h b/drivers/gpu/nvgpu/include/nvgpu/nvlink.h index 48851ff1..18e0aab6 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/nvlink.h +++ b/drivers/gpu/nvgpu/include/nvgpu/nvlink.h | |||
@@ -182,11 +182,10 @@ struct nvgpu_nvlink_dev { | |||
182 | u8 train_at_boot; | 182 | u8 train_at_boot; |
183 | u32 ac_coupling_mask; | 183 | u32 ac_coupling_mask; |
184 | 184 | ||
185 | u32 init_disabled_links; | ||
186 | u32 connected_links; | 185 | u32 connected_links; |
187 | u32 initialized_links; | 186 | u32 initialized_links; |
188 | u32 enabled_links; | 187 | u32 enabled_links; |
189 | u32 topology_connected_links; | 188 | u32 init_pll_done; |
190 | 189 | ||
191 | enum nvgpu_nvlink_speed speed; | 190 | enum nvgpu_nvlink_speed speed; |
192 | 191 | ||
@@ -195,12 +194,18 @@ struct nvgpu_nvlink_dev { | |||
195 | u32 hshub_config1; | 194 | u32 hshub_config1; |
196 | u32 hshub_config2; | 195 | u32 hshub_config2; |
197 | u32 hshub_config6; | 196 | u32 hshub_config6; |
197 | |||
198 | /* tlc cached errors */ | ||
199 | u32 tlc_rx_err_status_0[NVLINK_MAX_LINKS_SW]; | ||
200 | u32 tlc_rx_err_status_1[NVLINK_MAX_LINKS_SW]; | ||
201 | u32 tlc_tx_err_status_0[NVLINK_MAX_LINKS_SW]; | ||
202 | |||
198 | /* priv struct */ | 203 | /* priv struct */ |
199 | void *priv; | 204 | void *priv; |
200 | }; | 205 | }; |
201 | 206 | ||
202 | 207 | ||
203 | u32 nvgpu_nvlink_enumerate(struct gk20a *g); | 208 | int nvgpu_nvlink_enumerate(struct gk20a *g); |
204 | u32 nvgpu_nvlink_train(struct gk20a *g, u32 link_id, bool from_off); | 209 | int nvgpu_nvlink_train(struct gk20a *g, u32 link_id, bool from_off); |
205 | u32 nvgpu_nvlink_probe(struct gk20a *g); | 210 | int nvgpu_nvlink_probe(struct gk20a *g); |
206 | #endif | 211 | #endif |