gpu: nvgpu: Fix MISRA 15.6 violations

MISRA Rule-15.6 requires that all if-else blocks be enclosed in braces,
including single statement blocks. Fix errors due to single statement
if blocks without braces by introducing the braces.

JIRA NVGPU-671

Change-Id: I8046a09fa7ffc74c3d737ba57132a0a9ae2ff195
Signed-off-by: smadhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1797699
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 2 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/include/nvgpu/xve.h b/drivers/gpu/nvgpu/include/nvgpu/xve.h
index acaf441c..2d0d6982 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/xve.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/xve.h
@@ -55,8 +55,9 @@
 static inline const char *xve_speed_to_str(u32 speed)
 {
         if (!speed || !is_power_of_2(speed) ||
-            !(speed & GPU_XVE_SPEED_MASK))
+            !(speed & GPU_XVE_SPEED_MASK)) {
                 return "Unknown ???";
+        }
 
         return speed & GPU_XVE_SPEED_2P5 ? "Gen1" :
                speed & GPU_XVE_SPEED_5P0 ? "Gen2" :