gpu: nvgpu: nvhost: PC_SAMPLING ioctl failure.

NVGPU_DBG_GPU_IOCTL_PC_SAMPLING ioctl is not handled properly for HV
case for both Linux and QNX. Currently guest vm is trying to perform
gpu memory read and write operations which supposed to be done by RM
server, causing the crash. This patch is supposed to fix ioctl failure.

Bug 2052040

Change-Id: Ia0773959b84739a1bced858331764751520a3561
Signed-off-by: Prateek Sethi <prsethi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1708102
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sourab Gupta <sourabg@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Sourab Gupta <sourabg@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 11 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h b/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h
index f34fc5e7..4e6f2cd1 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h
@@ -117,6 +117,7 @@ enum {
         TEGRA_VGPU_CMD_FREE_CTX_HEADER = 78,
         TEGRA_VGPU_CMD_MAP_SYNCPT = 79,
         TEGRA_VGPU_CMD_TSG_BIND_CHANNEL_EX = 80,
+        TEGRA_VGPU_CMD_UPDATE_PC_SAMPLING = 81,
 };
 
 struct tegra_vgpu_connect_params {
@@ -354,12 +355,21 @@ enum {
         TEGRA_VGPU_CTXSW_MODE_CTXSW,
 };
 
+enum {
+        TEGRA_VGPU_DISABLE_SAMPLING = 0,
+        TEGRA_VGPU_ENABLE_SAMPLING,
+};
 struct tegra_vgpu_channel_set_ctxsw_mode {
         u64 handle;
         u64 gpu_va;
         u32 mode;
 };
 
+struct tegra_vgpu_channel_update_pc_sampling {
+        u64 handle;
+        u32 mode;
+};
+
 struct tegra_vgpu_channel_free_hwpm_ctx {
         u64 handle;
 };
@@ -638,6 +648,7 @@ struct tegra_vgpu_cmd_msg {
                 struct tegra_vgpu_free_ctx_header_params free_ctx_header;
                 struct tegra_vgpu_map_syncpt_params map_syncpt;
                 struct tegra_vgpu_tsg_bind_channel_ex_params tsg_bind_channel_ex;
+                struct tegra_vgpu_channel_update_pc_sampling update_pc_sampling;
                 char padding[192];
         } params;
 };