diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2018-08-16 15:51:25 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-08-28 00:44:21 -0400 |
commit | 6662188868b824d1fa99292cff0ce82b55d180ce (patch) | |
tree | d9686e5e37dd57183ba5a146b5c33af35deb31db /drivers/gpu/nvgpu/include/nvgpu/hw/gv11b | |
parent | 6f57a339ee359d57e470552da18e3f487e3e0625 (diff) |
gpu: nvgpu: Do not refer to RAM_IN fields in FB
Do not refer to bit width in RAM_IN field when shifting MMU fault
buffer entries. Export the correct bit shift values for the fields
and shift with that.
Change-Id: I6878118bb14f070626e8244d5044b6818c8ea283
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1801417
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include/nvgpu/hw/gv11b')
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h | 14 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gmmu_gv11b.h | 10 |
2 files changed, 22 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h index ea3c7939..5c4477a0 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -1112,6 +1112,10 @@ static inline u32 fb_mmu_fault_buffer_lo_addr_v(u32 r) | |||
1112 | { | 1112 | { |
1113 | return (r >> 12U) & 0xfffffU; | 1113 | return (r >> 12U) & 0xfffffU; |
1114 | } | 1114 | } |
1115 | static inline u32 fb_mmu_fault_buffer_lo_addr_b(void) | ||
1116 | { | ||
1117 | return 12U; | ||
1118 | } | ||
1115 | static inline u32 fb_mmu_fault_buffer_hi_r(u32 i) | 1119 | static inline u32 fb_mmu_fault_buffer_hi_r(u32 i) |
1116 | { | 1120 | { |
1117 | return 0x00100e28U + i*20U; | 1121 | return 0x00100e28U + i*20U; |
@@ -1340,6 +1344,10 @@ static inline u32 fb_mmu_fault_addr_lo_addr_v(u32 r) | |||
1340 | { | 1344 | { |
1341 | return (r >> 12U) & 0xfffffU; | 1345 | return (r >> 12U) & 0xfffffU; |
1342 | } | 1346 | } |
1347 | static inline u32 fb_mmu_fault_addr_lo_addr_b(void) | ||
1348 | { | ||
1349 | return 12U; | ||
1350 | } | ||
1343 | static inline u32 fb_mmu_fault_addr_hi_r(void) | 1351 | static inline u32 fb_mmu_fault_addr_hi_r(void) |
1344 | { | 1352 | { |
1345 | return 0x00100e50U; | 1353 | return 0x00100e50U; |
@@ -1380,6 +1388,10 @@ static inline u32 fb_mmu_fault_inst_lo_addr_v(u32 r) | |||
1380 | { | 1388 | { |
1381 | return (r >> 12U) & 0xfffffU; | 1389 | return (r >> 12U) & 0xfffffU; |
1382 | } | 1390 | } |
1391 | static inline u32 fb_mmu_fault_inst_lo_addr_b(void) | ||
1392 | { | ||
1393 | return 12U; | ||
1394 | } | ||
1383 | static inline u32 fb_mmu_fault_inst_hi_r(void) | 1395 | static inline u32 fb_mmu_fault_inst_hi_r(void) |
1384 | { | 1396 | { |
1385 | return 0x00100e58U; | 1397 | return 0x00100e58U; |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gmmu_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gmmu_gv11b.h index 0a442b1f..980f54c1 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gmmu_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gmmu_gv11b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -1320,6 +1320,10 @@ static inline u32 gmmu_fault_buf_entry_inst_lo_v(u32 r) | |||
1320 | { | 1320 | { |
1321 | return (r >> 12U) & 0xfffffU; | 1321 | return (r >> 12U) & 0xfffffU; |
1322 | } | 1322 | } |
1323 | static inline u32 gmmu_fault_buf_entry_inst_lo_b(void) | ||
1324 | { | ||
1325 | return 12U; | ||
1326 | } | ||
1323 | static inline u32 gmmu_fault_buf_entry_inst_lo_w(void) | 1327 | static inline u32 gmmu_fault_buf_entry_inst_lo_w(void) |
1324 | { | 1328 | { |
1325 | return 0U; | 1329 | return 0U; |
@@ -1348,6 +1352,10 @@ static inline u32 gmmu_fault_buf_entry_addr_lo_v(u32 r) | |||
1348 | { | 1352 | { |
1349 | return (r >> 12U) & 0xfffffU; | 1353 | return (r >> 12U) & 0xfffffU; |
1350 | } | 1354 | } |
1355 | static inline u32 gmmu_fault_buf_entry_addr_lo_b(void) | ||
1356 | { | ||
1357 | return 12U; | ||
1358 | } | ||
1351 | static inline u32 gmmu_fault_buf_entry_addr_lo_w(void) | 1359 | static inline u32 gmmu_fault_buf_entry_addr_lo_w(void) |
1352 | { | 1360 | { |
1353 | return 2U; | 1361 | return 2U; |