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authorTerje Bergstrom <tbergstrom@nvidia.com>2017-09-29 15:39:57 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-10-10 19:26:52 -0400
commit514c80d8d2d80cf9fa16447f7cd99d723ba5ce70 (patch)
treea97a55c2cbc3943098ff970ed38b48c90a91c9c2 /drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h
parentf518304e0d8102216c7c0022cd4b66fcd844264c (diff)
gpu: nvgpu: gv11b: Qualify unsigned HW constants
Re-generate hardware headers so that all unsigned constants are qualified with postfix U. This removes the need for compiler to do implicit signed->unsigned conversions. Change-Id: Ic93ef7f7a6beae57be7759c7eb3df9148afed824 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1571162 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h')
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h296
1 files changed, 148 insertions, 148 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h
index 025a7af3..74ff4002 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h
@@ -58,594 +58,594 @@
58 58
59static inline u32 pbdma_gp_entry1_r(void) 59static inline u32 pbdma_gp_entry1_r(void)
60{ 60{
61 return 0x10000004; 61 return 0x10000004U;
62} 62}
63static inline u32 pbdma_gp_entry1_get_hi_v(u32 r) 63static inline u32 pbdma_gp_entry1_get_hi_v(u32 r)
64{ 64{
65 return (r >> 0) & 0xff; 65 return (r >> 0U) & 0xffU;
66} 66}
67static inline u32 pbdma_gp_entry1_length_f(u32 v) 67static inline u32 pbdma_gp_entry1_length_f(u32 v)
68{ 68{
69 return (v & 0x1fffff) << 10; 69 return (v & 0x1fffffU) << 10U;
70} 70}
71static inline u32 pbdma_gp_entry1_length_v(u32 r) 71static inline u32 pbdma_gp_entry1_length_v(u32 r)
72{ 72{
73 return (r >> 10) & 0x1fffff; 73 return (r >> 10U) & 0x1fffffU;
74} 74}
75static inline u32 pbdma_gp_base_r(u32 i) 75static inline u32 pbdma_gp_base_r(u32 i)
76{ 76{
77 return 0x00040048 + i*8192; 77 return 0x00040048U + i*8192U;
78} 78}
79static inline u32 pbdma_gp_base__size_1_v(void) 79static inline u32 pbdma_gp_base__size_1_v(void)
80{ 80{
81 return 0x00000003; 81 return 0x00000003U;
82} 82}
83static inline u32 pbdma_gp_base_offset_f(u32 v) 83static inline u32 pbdma_gp_base_offset_f(u32 v)
84{ 84{
85 return (v & 0x1fffffff) << 3; 85 return (v & 0x1fffffffU) << 3U;
86} 86}
87static inline u32 pbdma_gp_base_rsvd_s(void) 87static inline u32 pbdma_gp_base_rsvd_s(void)
88{ 88{
89 return 3; 89 return 3U;
90} 90}
91static inline u32 pbdma_gp_base_hi_r(u32 i) 91static inline u32 pbdma_gp_base_hi_r(u32 i)
92{ 92{
93 return 0x0004004c + i*8192; 93 return 0x0004004cU + i*8192U;
94} 94}
95static inline u32 pbdma_gp_base_hi_offset_f(u32 v) 95static inline u32 pbdma_gp_base_hi_offset_f(u32 v)
96{ 96{
97 return (v & 0xff) << 0; 97 return (v & 0xffU) << 0U;
98} 98}
99static inline u32 pbdma_gp_base_hi_limit2_f(u32 v) 99static inline u32 pbdma_gp_base_hi_limit2_f(u32 v)
100{ 100{
101 return (v & 0x1f) << 16; 101 return (v & 0x1fU) << 16U;
102} 102}
103static inline u32 pbdma_gp_fetch_r(u32 i) 103static inline u32 pbdma_gp_fetch_r(u32 i)
104{ 104{
105 return 0x00040050 + i*8192; 105 return 0x00040050U + i*8192U;
106} 106}
107static inline u32 pbdma_gp_get_r(u32 i) 107static inline u32 pbdma_gp_get_r(u32 i)
108{ 108{
109 return 0x00040014 + i*8192; 109 return 0x00040014U + i*8192U;
110} 110}
111static inline u32 pbdma_gp_put_r(u32 i) 111static inline u32 pbdma_gp_put_r(u32 i)
112{ 112{
113 return 0x00040000 + i*8192; 113 return 0x00040000U + i*8192U;
114} 114}
115static inline u32 pbdma_pb_fetch_r(u32 i) 115static inline u32 pbdma_pb_fetch_r(u32 i)
116{ 116{
117 return 0x00040054 + i*8192; 117 return 0x00040054U + i*8192U;
118} 118}
119static inline u32 pbdma_pb_fetch_hi_r(u32 i) 119static inline u32 pbdma_pb_fetch_hi_r(u32 i)
120{ 120{
121 return 0x00040058 + i*8192; 121 return 0x00040058U + i*8192U;
122} 122}
123static inline u32 pbdma_get_r(u32 i) 123static inline u32 pbdma_get_r(u32 i)
124{ 124{
125 return 0x00040018 + i*8192; 125 return 0x00040018U + i*8192U;
126} 126}
127static inline u32 pbdma_get_hi_r(u32 i) 127static inline u32 pbdma_get_hi_r(u32 i)
128{ 128{
129 return 0x0004001c + i*8192; 129 return 0x0004001cU + i*8192U;
130} 130}
131static inline u32 pbdma_put_r(u32 i) 131static inline u32 pbdma_put_r(u32 i)
132{ 132{
133 return 0x0004005c + i*8192; 133 return 0x0004005cU + i*8192U;
134} 134}
135static inline u32 pbdma_put_hi_r(u32 i) 135static inline u32 pbdma_put_hi_r(u32 i)
136{ 136{
137 return 0x00040060 + i*8192; 137 return 0x00040060U + i*8192U;
138} 138}
139static inline u32 pbdma_pb_header_r(u32 i) 139static inline u32 pbdma_pb_header_r(u32 i)
140{ 140{
141 return 0x00040084 + i*8192; 141 return 0x00040084U + i*8192U;
142} 142}
143static inline u32 pbdma_pb_header_priv_user_f(void) 143static inline u32 pbdma_pb_header_priv_user_f(void)
144{ 144{
145 return 0x0; 145 return 0x0U;
146} 146}
147static inline u32 pbdma_pb_header_method_zero_f(void) 147static inline u32 pbdma_pb_header_method_zero_f(void)
148{ 148{
149 return 0x0; 149 return 0x0U;
150} 150}
151static inline u32 pbdma_pb_header_subchannel_zero_f(void) 151static inline u32 pbdma_pb_header_subchannel_zero_f(void)
152{ 152{
153 return 0x0; 153 return 0x0U;
154} 154}
155static inline u32 pbdma_pb_header_level_main_f(void) 155static inline u32 pbdma_pb_header_level_main_f(void)
156{ 156{
157 return 0x0; 157 return 0x0U;
158} 158}
159static inline u32 pbdma_pb_header_first_true_f(void) 159static inline u32 pbdma_pb_header_first_true_f(void)
160{ 160{
161 return 0x400000; 161 return 0x400000U;
162} 162}
163static inline u32 pbdma_pb_header_type_inc_f(void) 163static inline u32 pbdma_pb_header_type_inc_f(void)
164{ 164{
165 return 0x20000000; 165 return 0x20000000U;
166} 166}
167static inline u32 pbdma_pb_header_type_non_inc_f(void) 167static inline u32 pbdma_pb_header_type_non_inc_f(void)
168{ 168{
169 return 0x60000000; 169 return 0x60000000U;
170} 170}
171static inline u32 pbdma_hdr_shadow_r(u32 i) 171static inline u32 pbdma_hdr_shadow_r(u32 i)
172{ 172{
173 return 0x00040118 + i*8192; 173 return 0x00040118U + i*8192U;
174} 174}
175static inline u32 pbdma_subdevice_r(u32 i) 175static inline u32 pbdma_subdevice_r(u32 i)
176{ 176{
177 return 0x00040094 + i*8192; 177 return 0x00040094U + i*8192U;
178} 178}
179static inline u32 pbdma_subdevice_id_f(u32 v) 179static inline u32 pbdma_subdevice_id_f(u32 v)
180{ 180{
181 return (v & 0xfff) << 0; 181 return (v & 0xfffU) << 0U;
182} 182}
183static inline u32 pbdma_subdevice_status_active_f(void) 183static inline u32 pbdma_subdevice_status_active_f(void)
184{ 184{
185 return 0x10000000; 185 return 0x10000000U;
186} 186}
187static inline u32 pbdma_subdevice_channel_dma_enable_f(void) 187static inline u32 pbdma_subdevice_channel_dma_enable_f(void)
188{ 188{
189 return 0x20000000; 189 return 0x20000000U;
190} 190}
191static inline u32 pbdma_method0_r(u32 i) 191static inline u32 pbdma_method0_r(u32 i)
192{ 192{
193 return 0x000400c0 + i*8192; 193 return 0x000400c0U + i*8192U;
194} 194}
195static inline u32 pbdma_method0_fifo_size_v(void) 195static inline u32 pbdma_method0_fifo_size_v(void)
196{ 196{
197 return 0x00000004; 197 return 0x00000004U;
198} 198}
199static inline u32 pbdma_method0_addr_f(u32 v) 199static inline u32 pbdma_method0_addr_f(u32 v)
200{ 200{
201 return (v & 0xfff) << 2; 201 return (v & 0xfffU) << 2U;
202} 202}
203static inline u32 pbdma_method0_addr_v(u32 r) 203static inline u32 pbdma_method0_addr_v(u32 r)
204{ 204{
205 return (r >> 2) & 0xfff; 205 return (r >> 2U) & 0xfffU;
206} 206}
207static inline u32 pbdma_method0_subch_v(u32 r) 207static inline u32 pbdma_method0_subch_v(u32 r)
208{ 208{
209 return (r >> 16) & 0x7; 209 return (r >> 16U) & 0x7U;
210} 210}
211static inline u32 pbdma_method0_first_true_f(void) 211static inline u32 pbdma_method0_first_true_f(void)
212{ 212{
213 return 0x400000; 213 return 0x400000U;
214} 214}
215static inline u32 pbdma_method0_valid_true_f(void) 215static inline u32 pbdma_method0_valid_true_f(void)
216{ 216{
217 return 0x80000000; 217 return 0x80000000U;
218} 218}
219static inline u32 pbdma_method1_r(u32 i) 219static inline u32 pbdma_method1_r(u32 i)
220{ 220{
221 return 0x000400c8 + i*8192; 221 return 0x000400c8U + i*8192U;
222} 222}
223static inline u32 pbdma_method2_r(u32 i) 223static inline u32 pbdma_method2_r(u32 i)
224{ 224{
225 return 0x000400d0 + i*8192; 225 return 0x000400d0U + i*8192U;
226} 226}
227static inline u32 pbdma_method3_r(u32 i) 227static inline u32 pbdma_method3_r(u32 i)
228{ 228{
229 return 0x000400d8 + i*8192; 229 return 0x000400d8U + i*8192U;
230} 230}
231static inline u32 pbdma_data0_r(u32 i) 231static inline u32 pbdma_data0_r(u32 i)
232{ 232{
233 return 0x000400c4 + i*8192; 233 return 0x000400c4U + i*8192U;
234} 234}
235static inline u32 pbdma_acquire_r(u32 i) 235static inline u32 pbdma_acquire_r(u32 i)
236{ 236{
237 return 0x00040030 + i*8192; 237 return 0x00040030U + i*8192U;
238} 238}
239static inline u32 pbdma_acquire_retry_man_2_f(void) 239static inline u32 pbdma_acquire_retry_man_2_f(void)
240{ 240{
241 return 0x2; 241 return 0x2U;
242} 242}
243static inline u32 pbdma_acquire_retry_exp_2_f(void) 243static inline u32 pbdma_acquire_retry_exp_2_f(void)
244{ 244{
245 return 0x100; 245 return 0x100U;
246} 246}
247static inline u32 pbdma_acquire_timeout_exp_f(u32 v) 247static inline u32 pbdma_acquire_timeout_exp_f(u32 v)
248{ 248{
249 return (v & 0xf) << 11; 249 return (v & 0xfU) << 11U;
250} 250}
251static inline u32 pbdma_acquire_timeout_exp_max_v(void) 251static inline u32 pbdma_acquire_timeout_exp_max_v(void)
252{ 252{
253 return 0x0000000f; 253 return 0x0000000fU;
254} 254}
255static inline u32 pbdma_acquire_timeout_exp_max_f(void) 255static inline u32 pbdma_acquire_timeout_exp_max_f(void)
256{ 256{
257 return 0x7800; 257 return 0x7800U;
258} 258}
259static inline u32 pbdma_acquire_timeout_man_f(u32 v) 259static inline u32 pbdma_acquire_timeout_man_f(u32 v)
260{ 260{
261 return (v & 0xffff) << 15; 261 return (v & 0xffffU) << 15U;
262} 262}
263static inline u32 pbdma_acquire_timeout_man_max_v(void) 263static inline u32 pbdma_acquire_timeout_man_max_v(void)
264{ 264{
265 return 0x0000ffff; 265 return 0x0000ffffU;
266} 266}
267static inline u32 pbdma_acquire_timeout_man_max_f(void) 267static inline u32 pbdma_acquire_timeout_man_max_f(void)
268{ 268{
269 return 0x7fff8000; 269 return 0x7fff8000U;
270} 270}
271static inline u32 pbdma_acquire_timeout_en_enable_f(void) 271static inline u32 pbdma_acquire_timeout_en_enable_f(void)
272{ 272{
273 return 0x80000000; 273 return 0x80000000U;
274} 274}
275static inline u32 pbdma_acquire_timeout_en_disable_f(void) 275static inline u32 pbdma_acquire_timeout_en_disable_f(void)
276{ 276{
277 return 0x0; 277 return 0x0U;
278} 278}
279static inline u32 pbdma_status_r(u32 i) 279static inline u32 pbdma_status_r(u32 i)
280{ 280{
281 return 0x00040100 + i*8192; 281 return 0x00040100U + i*8192U;
282} 282}
283static inline u32 pbdma_channel_r(u32 i) 283static inline u32 pbdma_channel_r(u32 i)
284{ 284{
285 return 0x00040120 + i*8192; 285 return 0x00040120U + i*8192U;
286} 286}
287static inline u32 pbdma_signature_r(u32 i) 287static inline u32 pbdma_signature_r(u32 i)
288{ 288{
289 return 0x00040010 + i*8192; 289 return 0x00040010U + i*8192U;
290} 290}
291static inline u32 pbdma_signature_hw_valid_f(void) 291static inline u32 pbdma_signature_hw_valid_f(void)
292{ 292{
293 return 0xface; 293 return 0xfaceU;
294} 294}
295static inline u32 pbdma_signature_sw_zero_f(void) 295static inline u32 pbdma_signature_sw_zero_f(void)
296{ 296{
297 return 0x0; 297 return 0x0U;
298} 298}
299static inline u32 pbdma_userd_r(u32 i) 299static inline u32 pbdma_userd_r(u32 i)
300{ 300{
301 return 0x00040008 + i*8192; 301 return 0x00040008U + i*8192U;
302} 302}
303static inline u32 pbdma_userd_target_vid_mem_f(void) 303static inline u32 pbdma_userd_target_vid_mem_f(void)
304{ 304{
305 return 0x0; 305 return 0x0U;
306} 306}
307static inline u32 pbdma_userd_target_sys_mem_coh_f(void) 307static inline u32 pbdma_userd_target_sys_mem_coh_f(void)
308{ 308{
309 return 0x2; 309 return 0x2U;
310} 310}
311static inline u32 pbdma_userd_target_sys_mem_ncoh_f(void) 311static inline u32 pbdma_userd_target_sys_mem_ncoh_f(void)
312{ 312{
313 return 0x3; 313 return 0x3U;
314} 314}
315static inline u32 pbdma_userd_addr_f(u32 v) 315static inline u32 pbdma_userd_addr_f(u32 v)
316{ 316{
317 return (v & 0x7fffff) << 9; 317 return (v & 0x7fffffU) << 9U;
318} 318}
319static inline u32 pbdma_config_r(u32 i) 319static inline u32 pbdma_config_r(u32 i)
320{ 320{
321 return 0x000400f4 + i*8192; 321 return 0x000400f4U + i*8192U;
322} 322}
323static inline u32 pbdma_config_l2_evict_first_f(void) 323static inline u32 pbdma_config_l2_evict_first_f(void)
324{ 324{
325 return 0x0; 325 return 0x0U;
326} 326}
327static inline u32 pbdma_config_l2_evict_normal_f(void) 327static inline u32 pbdma_config_l2_evict_normal_f(void)
328{ 328{
329 return 0x1; 329 return 0x1U;
330} 330}
331static inline u32 pbdma_config_l2_evict_last_f(void) 331static inline u32 pbdma_config_l2_evict_last_f(void)
332{ 332{
333 return 0x2; 333 return 0x2U;
334} 334}
335static inline u32 pbdma_config_ce_split_enable_f(void) 335static inline u32 pbdma_config_ce_split_enable_f(void)
336{ 336{
337 return 0x0; 337 return 0x0U;
338} 338}
339static inline u32 pbdma_config_ce_split_disable_f(void) 339static inline u32 pbdma_config_ce_split_disable_f(void)
340{ 340{
341 return 0x10; 341 return 0x10U;
342} 342}
343static inline u32 pbdma_config_auth_level_non_privileged_f(void) 343static inline u32 pbdma_config_auth_level_non_privileged_f(void)
344{ 344{
345 return 0x0; 345 return 0x0U;
346} 346}
347static inline u32 pbdma_config_auth_level_privileged_f(void) 347static inline u32 pbdma_config_auth_level_privileged_f(void)
348{ 348{
349 return 0x100; 349 return 0x100U;
350} 350}
351static inline u32 pbdma_config_userd_writeback_disable_f(void) 351static inline u32 pbdma_config_userd_writeback_disable_f(void)
352{ 352{
353 return 0x0; 353 return 0x0U;
354} 354}
355static inline u32 pbdma_config_userd_writeback_enable_f(void) 355static inline u32 pbdma_config_userd_writeback_enable_f(void)
356{ 356{
357 return 0x1000; 357 return 0x1000U;
358} 358}
359static inline u32 pbdma_userd_hi_r(u32 i) 359static inline u32 pbdma_userd_hi_r(u32 i)
360{ 360{
361 return 0x0004000c + i*8192; 361 return 0x0004000cU + i*8192U;
362} 362}
363static inline u32 pbdma_userd_hi_addr_f(u32 v) 363static inline u32 pbdma_userd_hi_addr_f(u32 v)
364{ 364{
365 return (v & 0xff) << 0; 365 return (v & 0xffU) << 0U;
366} 366}
367static inline u32 pbdma_hce_ctrl_r(u32 i) 367static inline u32 pbdma_hce_ctrl_r(u32 i)
368{ 368{
369 return 0x000400e4 + i*8192; 369 return 0x000400e4U + i*8192U;
370} 370}
371static inline u32 pbdma_hce_ctrl_hce_priv_mode_yes_f(void) 371static inline u32 pbdma_hce_ctrl_hce_priv_mode_yes_f(void)
372{ 372{
373 return 0x20; 373 return 0x20U;
374} 374}
375static inline u32 pbdma_intr_0_r(u32 i) 375static inline u32 pbdma_intr_0_r(u32 i)
376{ 376{
377 return 0x00040108 + i*8192; 377 return 0x00040108U + i*8192U;
378} 378}
379static inline u32 pbdma_intr_0_memreq_v(u32 r) 379static inline u32 pbdma_intr_0_memreq_v(u32 r)
380{ 380{
381 return (r >> 0) & 0x1; 381 return (r >> 0U) & 0x1U;
382} 382}
383static inline u32 pbdma_intr_0_memreq_pending_f(void) 383static inline u32 pbdma_intr_0_memreq_pending_f(void)
384{ 384{
385 return 0x1; 385 return 0x1U;
386} 386}
387static inline u32 pbdma_intr_0_memack_timeout_pending_f(void) 387static inline u32 pbdma_intr_0_memack_timeout_pending_f(void)
388{ 388{
389 return 0x2; 389 return 0x2U;
390} 390}
391static inline u32 pbdma_intr_0_memack_extra_pending_f(void) 391static inline u32 pbdma_intr_0_memack_extra_pending_f(void)
392{ 392{
393 return 0x4; 393 return 0x4U;
394} 394}
395static inline u32 pbdma_intr_0_memdat_timeout_pending_f(void) 395static inline u32 pbdma_intr_0_memdat_timeout_pending_f(void)
396{ 396{
397 return 0x8; 397 return 0x8U;
398} 398}
399static inline u32 pbdma_intr_0_memdat_extra_pending_f(void) 399static inline u32 pbdma_intr_0_memdat_extra_pending_f(void)
400{ 400{
401 return 0x10; 401 return 0x10U;
402} 402}
403static inline u32 pbdma_intr_0_memflush_pending_f(void) 403static inline u32 pbdma_intr_0_memflush_pending_f(void)
404{ 404{
405 return 0x20; 405 return 0x20U;
406} 406}
407static inline u32 pbdma_intr_0_memop_pending_f(void) 407static inline u32 pbdma_intr_0_memop_pending_f(void)
408{ 408{
409 return 0x40; 409 return 0x40U;
410} 410}
411static inline u32 pbdma_intr_0_lbconnect_pending_f(void) 411static inline u32 pbdma_intr_0_lbconnect_pending_f(void)
412{ 412{
413 return 0x80; 413 return 0x80U;
414} 414}
415static inline u32 pbdma_intr_0_lbreq_pending_f(void) 415static inline u32 pbdma_intr_0_lbreq_pending_f(void)
416{ 416{
417 return 0x100; 417 return 0x100U;
418} 418}
419static inline u32 pbdma_intr_0_lback_timeout_pending_f(void) 419static inline u32 pbdma_intr_0_lback_timeout_pending_f(void)
420{ 420{
421 return 0x200; 421 return 0x200U;
422} 422}
423static inline u32 pbdma_intr_0_lback_extra_pending_f(void) 423static inline u32 pbdma_intr_0_lback_extra_pending_f(void)
424{ 424{
425 return 0x400; 425 return 0x400U;
426} 426}
427static inline u32 pbdma_intr_0_lbdat_timeout_pending_f(void) 427static inline u32 pbdma_intr_0_lbdat_timeout_pending_f(void)
428{ 428{
429 return 0x800; 429 return 0x800U;
430} 430}
431static inline u32 pbdma_intr_0_lbdat_extra_pending_f(void) 431static inline u32 pbdma_intr_0_lbdat_extra_pending_f(void)
432{ 432{
433 return 0x1000; 433 return 0x1000U;
434} 434}
435static inline u32 pbdma_intr_0_gpfifo_pending_f(void) 435static inline u32 pbdma_intr_0_gpfifo_pending_f(void)
436{ 436{
437 return 0x2000; 437 return 0x2000U;
438} 438}
439static inline u32 pbdma_intr_0_gpptr_pending_f(void) 439static inline u32 pbdma_intr_0_gpptr_pending_f(void)
440{ 440{
441 return 0x4000; 441 return 0x4000U;
442} 442}
443static inline u32 pbdma_intr_0_gpentry_pending_f(void) 443static inline u32 pbdma_intr_0_gpentry_pending_f(void)
444{ 444{
445 return 0x8000; 445 return 0x8000U;
446} 446}
447static inline u32 pbdma_intr_0_gpcrc_pending_f(void) 447static inline u32 pbdma_intr_0_gpcrc_pending_f(void)
448{ 448{
449 return 0x10000; 449 return 0x10000U;
450} 450}
451static inline u32 pbdma_intr_0_pbptr_pending_f(void) 451static inline u32 pbdma_intr_0_pbptr_pending_f(void)
452{ 452{
453 return 0x20000; 453 return 0x20000U;
454} 454}
455static inline u32 pbdma_intr_0_pbentry_pending_f(void) 455static inline u32 pbdma_intr_0_pbentry_pending_f(void)
456{ 456{
457 return 0x40000; 457 return 0x40000U;
458} 458}
459static inline u32 pbdma_intr_0_pbcrc_pending_f(void) 459static inline u32 pbdma_intr_0_pbcrc_pending_f(void)
460{ 460{
461 return 0x80000; 461 return 0x80000U;
462} 462}
463static inline u32 pbdma_intr_0_clear_faulted_error_pending_f(void) 463static inline u32 pbdma_intr_0_clear_faulted_error_pending_f(void)
464{ 464{
465 return 0x100000; 465 return 0x100000U;
466} 466}
467static inline u32 pbdma_intr_0_method_pending_f(void) 467static inline u32 pbdma_intr_0_method_pending_f(void)
468{ 468{
469 return 0x200000; 469 return 0x200000U;
470} 470}
471static inline u32 pbdma_intr_0_methodcrc_pending_f(void) 471static inline u32 pbdma_intr_0_methodcrc_pending_f(void)
472{ 472{
473 return 0x400000; 473 return 0x400000U;
474} 474}
475static inline u32 pbdma_intr_0_device_pending_f(void) 475static inline u32 pbdma_intr_0_device_pending_f(void)
476{ 476{
477 return 0x800000; 477 return 0x800000U;
478} 478}
479static inline u32 pbdma_intr_0_eng_reset_pending_f(void) 479static inline u32 pbdma_intr_0_eng_reset_pending_f(void)
480{ 480{
481 return 0x1000000; 481 return 0x1000000U;
482} 482}
483static inline u32 pbdma_intr_0_semaphore_pending_f(void) 483static inline u32 pbdma_intr_0_semaphore_pending_f(void)
484{ 484{
485 return 0x2000000; 485 return 0x2000000U;
486} 486}
487static inline u32 pbdma_intr_0_acquire_pending_f(void) 487static inline u32 pbdma_intr_0_acquire_pending_f(void)
488{ 488{
489 return 0x4000000; 489 return 0x4000000U;
490} 490}
491static inline u32 pbdma_intr_0_pri_pending_f(void) 491static inline u32 pbdma_intr_0_pri_pending_f(void)
492{ 492{
493 return 0x8000000; 493 return 0x8000000U;
494} 494}
495static inline u32 pbdma_intr_0_no_ctxsw_seg_pending_f(void) 495static inline u32 pbdma_intr_0_no_ctxsw_seg_pending_f(void)
496{ 496{
497 return 0x20000000; 497 return 0x20000000U;
498} 498}
499static inline u32 pbdma_intr_0_pbseg_pending_f(void) 499static inline u32 pbdma_intr_0_pbseg_pending_f(void)
500{ 500{
501 return 0x40000000; 501 return 0x40000000U;
502} 502}
503static inline u32 pbdma_intr_0_signature_pending_f(void) 503static inline u32 pbdma_intr_0_signature_pending_f(void)
504{ 504{
505 return 0x80000000; 505 return 0x80000000U;
506} 506}
507static inline u32 pbdma_intr_1_r(u32 i) 507static inline u32 pbdma_intr_1_r(u32 i)
508{ 508{
509 return 0x00040148 + i*8192; 509 return 0x00040148U + i*8192U;
510} 510}
511static inline u32 pbdma_intr_1_ctxnotvalid_m(void) 511static inline u32 pbdma_intr_1_ctxnotvalid_m(void)
512{ 512{
513 return 0x1 << 31; 513 return 0x1U << 31U;
514} 514}
515static inline u32 pbdma_intr_1_ctxnotvalid_pending_f(void) 515static inline u32 pbdma_intr_1_ctxnotvalid_pending_f(void)
516{ 516{
517 return 0x80000000; 517 return 0x80000000U;
518} 518}
519static inline u32 pbdma_intr_en_0_r(u32 i) 519static inline u32 pbdma_intr_en_0_r(u32 i)
520{ 520{
521 return 0x0004010c + i*8192; 521 return 0x0004010cU + i*8192U;
522} 522}
523static inline u32 pbdma_intr_en_0_lbreq_enabled_f(void) 523static inline u32 pbdma_intr_en_0_lbreq_enabled_f(void)
524{ 524{
525 return 0x100; 525 return 0x100U;
526} 526}
527static inline u32 pbdma_intr_en_1_r(u32 i) 527static inline u32 pbdma_intr_en_1_r(u32 i)
528{ 528{
529 return 0x0004014c + i*8192; 529 return 0x0004014cU + i*8192U;
530} 530}
531static inline u32 pbdma_intr_stall_r(u32 i) 531static inline u32 pbdma_intr_stall_r(u32 i)
532{ 532{
533 return 0x0004013c + i*8192; 533 return 0x0004013cU + i*8192U;
534} 534}
535static inline u32 pbdma_intr_stall_lbreq_enabled_f(void) 535static inline u32 pbdma_intr_stall_lbreq_enabled_f(void)
536{ 536{
537 return 0x100; 537 return 0x100U;
538} 538}
539static inline u32 pbdma_intr_stall_1_r(u32 i) 539static inline u32 pbdma_intr_stall_1_r(u32 i)
540{ 540{
541 return 0x00040140 + i*8192; 541 return 0x00040140U + i*8192U;
542} 542}
543static inline u32 pbdma_udma_nop_r(void) 543static inline u32 pbdma_udma_nop_r(void)
544{ 544{
545 return 0x00000008; 545 return 0x00000008U;
546} 546}
547static inline u32 pbdma_runlist_timeslice_r(u32 i) 547static inline u32 pbdma_runlist_timeslice_r(u32 i)
548{ 548{
549 return 0x000400f8 + i*8192; 549 return 0x000400f8U + i*8192U;
550} 550}
551static inline u32 pbdma_runlist_timeslice_timeout_128_f(void) 551static inline u32 pbdma_runlist_timeslice_timeout_128_f(void)
552{ 552{
553 return 0x80; 553 return 0x80U;
554} 554}
555static inline u32 pbdma_runlist_timeslice_timescale_3_f(void) 555static inline u32 pbdma_runlist_timeslice_timescale_3_f(void)
556{ 556{
557 return 0x3000; 557 return 0x3000U;
558} 558}
559static inline u32 pbdma_runlist_timeslice_enable_true_f(void) 559static inline u32 pbdma_runlist_timeslice_enable_true_f(void)
560{ 560{
561 return 0x10000000; 561 return 0x10000000U;
562} 562}
563static inline u32 pbdma_target_r(u32 i) 563static inline u32 pbdma_target_r(u32 i)
564{ 564{
565 return 0x000400ac + i*8192; 565 return 0x000400acU + i*8192U;
566} 566}
567static inline u32 pbdma_target_engine_sw_f(void) 567static inline u32 pbdma_target_engine_sw_f(void)
568{ 568{
569 return 0x1f; 569 return 0x1fU;
570} 570}
571static inline u32 pbdma_target_eng_ctx_valid_true_f(void) 571static inline u32 pbdma_target_eng_ctx_valid_true_f(void)
572{ 572{
573 return 0x10000; 573 return 0x10000U;
574} 574}
575static inline u32 pbdma_target_eng_ctx_valid_false_f(void) 575static inline u32 pbdma_target_eng_ctx_valid_false_f(void)
576{ 576{
577 return 0x0; 577 return 0x0U;
578} 578}
579static inline u32 pbdma_target_ce_ctx_valid_true_f(void) 579static inline u32 pbdma_target_ce_ctx_valid_true_f(void)
580{ 580{
581 return 0x20000; 581 return 0x20000U;
582} 582}
583static inline u32 pbdma_target_ce_ctx_valid_false_f(void) 583static inline u32 pbdma_target_ce_ctx_valid_false_f(void)
584{ 584{
585 return 0x0; 585 return 0x0U;
586} 586}
587static inline u32 pbdma_target_host_tsg_event_reason_pbdma_idle_f(void) 587static inline u32 pbdma_target_host_tsg_event_reason_pbdma_idle_f(void)
588{ 588{
589 return 0x0; 589 return 0x0U;
590} 590}
591static inline u32 pbdma_target_host_tsg_event_reason_semaphore_acquire_failure_f(void) 591static inline u32 pbdma_target_host_tsg_event_reason_semaphore_acquire_failure_f(void)
592{ 592{
593 return 0x1000000; 593 return 0x1000000U;
594} 594}
595static inline u32 pbdma_target_host_tsg_event_reason_tsg_yield_f(void) 595static inline u32 pbdma_target_host_tsg_event_reason_tsg_yield_f(void)
596{ 596{
597 return 0x2000000; 597 return 0x2000000U;
598} 598}
599static inline u32 pbdma_target_host_tsg_event_reason_host_subchannel_switch_f(void) 599static inline u32 pbdma_target_host_tsg_event_reason_host_subchannel_switch_f(void)
600{ 600{
601 return 0x3000000; 601 return 0x3000000U;
602} 602}
603static inline u32 pbdma_target_should_send_tsg_event_true_f(void) 603static inline u32 pbdma_target_should_send_tsg_event_true_f(void)
604{ 604{
605 return 0x20000000; 605 return 0x20000000U;
606} 606}
607static inline u32 pbdma_target_should_send_tsg_event_false_f(void) 607static inline u32 pbdma_target_should_send_tsg_event_false_f(void)
608{ 608{
609 return 0x0; 609 return 0x0U;
610} 610}
611static inline u32 pbdma_target_needs_host_tsg_event_true_f(void) 611static inline u32 pbdma_target_needs_host_tsg_event_true_f(void)
612{ 612{
613 return 0x80000000; 613 return 0x80000000U;
614} 614}
615static inline u32 pbdma_target_needs_host_tsg_event_false_f(void) 615static inline u32 pbdma_target_needs_host_tsg_event_false_f(void)
616{ 616{
617 return 0x0; 617 return 0x0U;
618} 618}
619static inline u32 pbdma_set_channel_info_r(u32 i) 619static inline u32 pbdma_set_channel_info_r(u32 i)
620{ 620{
621 return 0x000400fc + i*8192; 621 return 0x000400fcU + i*8192U;
622} 622}
623static inline u32 pbdma_set_channel_info_scg_type_graphics_compute0_f(void) 623static inline u32 pbdma_set_channel_info_scg_type_graphics_compute0_f(void)
624{ 624{
625 return 0x0; 625 return 0x0U;
626} 626}
627static inline u32 pbdma_set_channel_info_scg_type_compute1_f(void) 627static inline u32 pbdma_set_channel_info_scg_type_compute1_f(void)
628{ 628{
629 return 0x1; 629 return 0x1U;
630} 630}
631static inline u32 pbdma_set_channel_info_veid_f(u32 v) 631static inline u32 pbdma_set_channel_info_veid_f(u32 v)
632{ 632{
633 return (v & 0x3f) << 8; 633 return (v & 0x3fU) << 8U;
634} 634}
635static inline u32 pbdma_timeout_r(u32 i) 635static inline u32 pbdma_timeout_r(u32 i)
636{ 636{
637 return 0x0004012c + i*8192; 637 return 0x0004012cU + i*8192U;
638} 638}
639static inline u32 pbdma_timeout_period_m(void) 639static inline u32 pbdma_timeout_period_m(void)
640{ 640{
641 return 0xffffffff << 0; 641 return 0xffffffffU << 0U;
642} 642}
643static inline u32 pbdma_timeout_period_max_f(void) 643static inline u32 pbdma_timeout_period_max_f(void)
644{ 644{
645 return 0xffffffff; 645 return 0xffffffffU;
646} 646}
647static inline u32 pbdma_timeout_period_init_f(void) 647static inline u32 pbdma_timeout_period_init_f(void)
648{ 648{
649 return 0x10000; 649 return 0x10000U;
650} 650}
651#endif 651#endif