Revert "gpu: nvgpu: gv11b: enable RMW for gpu atomics"

The original change caused cuda atomic perf regression.

Bug 2310618

This reverts commit 10c3d4447d4206302f5d51695bf1f193255dd889.

Change-Id: Iea5391a89fdfadfb9a79cda57e71f1c9e87ca882
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1793880
(cherry picked from commit d0e51ddcb8139de70916335f124a80b8b588308b)
Reviewed-on: https://git-master.nvidia.com/r/1804945
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 0 insertions, 8 deletions

diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h
index 473eaff4..588452cd 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h
@@ -4972,14 +4972,6 @@ static inline u32 gr_gpcs_pri_mmu_ctrl_mmu_disable_m(void)
 {
         return 0x1U << 31U;
 }
-static inline u32 gr_gpcs_pri_mmu_ctrl_atomic_capability_mode_m(void)
-{
-        return 0x3U << 24U;
-}
-static inline u32 gr_gpcs_pri_mmu_ctrl_atomic_capability_mode_rmw_f(void)
-{
-        return 0x2000000U;
-}
 static inline u32 gr_gpcs_pri_mmu_pm_unit_mask_r(void)
 {
         return 0x00418890U;