diff options
author | Deepak Goyal <dgoyal@nvidia.com> | 2018-07-16 01:40:23 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-07-24 02:52:39 -0400 |
commit | d3b8415948de8c9ffe2f2fa66340dd7e71a894e6 (patch) | |
tree | 328970819ace31fae3bf3bc27376121330064db9 /drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h | |
parent | 2df33e32e40eb2c8e025f8d27396d9b5cdb3ac11 (diff) |
gpu: nvgpu: tpc powergating through sysfs
- adds static tpc-powergating through sysfs.
- active tpc count will remain till the GPU/systems is not booted again.
- tpc_pg_mask can be written only after GPU probe finishes and
GPU boot is triggered.
Note:
To be able to use this feature, we need to change boot/init
scripts of the OS(used with nvgpu driver) to write to sysfs nodes before
posting discover image size query to FECS.
Bug 200406784
Change-Id: Id749c7a617422c625f77d0c1a9aada2eb960c4d0
Signed-off-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1742422
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h')
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h index 90994a53..473eaff4 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h | |||
@@ -1572,6 +1572,42 @@ static inline u32 gr_fe_tpc_fs_r(u32 i) | |||
1572 | { | 1572 | { |
1573 | return 0x0040a200U + i*4U; | 1573 | return 0x0040a200U + i*4U; |
1574 | } | 1574 | } |
1575 | static inline u32 gr_fe_tpc_pesmask_r(void) | ||
1576 | { | ||
1577 | return 0x0040a260U; | ||
1578 | } | ||
1579 | static inline u32 gr_fe_tpc_pesmask_pesid_f(u32 v) | ||
1580 | { | ||
1581 | return (v & 0x3fU) << 24U; | ||
1582 | } | ||
1583 | static inline u32 gr_fe_tpc_pesmask_gpcid_f(u32 v) | ||
1584 | { | ||
1585 | return (v & 0xffU) << 16U; | ||
1586 | } | ||
1587 | static inline u32 gr_fe_tpc_pesmask_action_m(void) | ||
1588 | { | ||
1589 | return 0x1U << 30U; | ||
1590 | } | ||
1591 | static inline u32 gr_fe_tpc_pesmask_action_write_f(void) | ||
1592 | { | ||
1593 | return 0x40000000U; | ||
1594 | } | ||
1595 | static inline u32 gr_fe_tpc_pesmask_action_read_f(void) | ||
1596 | { | ||
1597 | return 0x0U; | ||
1598 | } | ||
1599 | static inline u32 gr_fe_tpc_pesmask_req_m(void) | ||
1600 | { | ||
1601 | return 0x1U << 31U; | ||
1602 | } | ||
1603 | static inline u32 gr_fe_tpc_pesmask_req_send_f(void) | ||
1604 | { | ||
1605 | return 0x80000000U; | ||
1606 | } | ||
1607 | static inline u32 gr_fe_tpc_pesmask_mask_m(void) | ||
1608 | { | ||
1609 | return 0xffffU << 0U; | ||
1610 | } | ||
1575 | static inline u32 gr_pri_mme_shadow_raw_index_r(void) | 1611 | static inline u32 gr_pri_mme_shadow_raw_index_r(void) |
1576 | { | 1612 | { |
1577 | return 0x00404488U; | 1613 | return 0x00404488U; |