summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_timer_gp10b.h
diff options
context:
space:
mode:
authorTerje Bergstrom <tbergstrom@nvidia.com>2017-09-25 16:33:12 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-09-27 17:17:51 -0400
commit406b73e422b6d31979b7ce0a0848a6c2025d7ebf (patch)
treecd0a3fa1e0d89ac5c54f4818540b4eb540440f26 /drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_timer_gp10b.h
parente7c9109f60e2d5f5570f5e3c71dcc824bb415688 (diff)
gpu: nvgpu: gp10b: Qualify unsigned HW constants
Re-generate hardware headers so that all unsigned constants are qualified with postfix U. This removes the need for compiler to do implicit signed->unsigned conversions. Change-Id: I33d46bb103d083316266eb1d325ca9f1525bf047 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1567985 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_timer_gp10b.h')
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_timer_gp10b.h28
1 files changed, 14 insertions, 14 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_timer_gp10b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_timer_gp10b.h
index dd73eba1..db752648 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_timer_gp10b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_timer_gp10b.h
@@ -58,58 +58,58 @@
58 58
59static inline u32 timer_pri_timeout_r(void) 59static inline u32 timer_pri_timeout_r(void)
60{ 60{
61 return 0x00009080; 61 return 0x00009080U;
62} 62}
63static inline u32 timer_pri_timeout_period_f(u32 v) 63static inline u32 timer_pri_timeout_period_f(u32 v)
64{ 64{
65 return (v & 0xffffff) << 0; 65 return (v & 0xffffffU) << 0U;
66} 66}
67static inline u32 timer_pri_timeout_period_m(void) 67static inline u32 timer_pri_timeout_period_m(void)
68{ 68{
69 return 0xffffff << 0; 69 return 0xffffffU << 0U;
70} 70}
71static inline u32 timer_pri_timeout_period_v(u32 r) 71static inline u32 timer_pri_timeout_period_v(u32 r)
72{ 72{
73 return (r >> 0) & 0xffffff; 73 return (r >> 0U) & 0xffffffU;
74} 74}
75static inline u32 timer_pri_timeout_en_f(u32 v) 75static inline u32 timer_pri_timeout_en_f(u32 v)
76{ 76{
77 return (v & 0x1) << 31; 77 return (v & 0x1U) << 31U;
78} 78}
79static inline u32 timer_pri_timeout_en_m(void) 79static inline u32 timer_pri_timeout_en_m(void)
80{ 80{
81 return 0x1 << 31; 81 return 0x1U << 31U;
82} 82}
83static inline u32 timer_pri_timeout_en_v(u32 r) 83static inline u32 timer_pri_timeout_en_v(u32 r)
84{ 84{
85 return (r >> 31) & 0x1; 85 return (r >> 31U) & 0x1U;
86} 86}
87static inline u32 timer_pri_timeout_en_en_enabled_f(void) 87static inline u32 timer_pri_timeout_en_en_enabled_f(void)
88{ 88{
89 return 0x80000000; 89 return 0x80000000U;
90} 90}
91static inline u32 timer_pri_timeout_en_en_disabled_f(void) 91static inline u32 timer_pri_timeout_en_en_disabled_f(void)
92{ 92{
93 return 0x0; 93 return 0x0U;
94} 94}
95static inline u32 timer_pri_timeout_save_0_r(void) 95static inline u32 timer_pri_timeout_save_0_r(void)
96{ 96{
97 return 0x00009084; 97 return 0x00009084U;
98} 98}
99static inline u32 timer_pri_timeout_save_1_r(void) 99static inline u32 timer_pri_timeout_save_1_r(void)
100{ 100{
101 return 0x00009088; 101 return 0x00009088U;
102} 102}
103static inline u32 timer_pri_timeout_fecs_errcode_r(void) 103static inline u32 timer_pri_timeout_fecs_errcode_r(void)
104{ 104{
105 return 0x0000908c; 105 return 0x0000908cU;
106} 106}
107static inline u32 timer_time_0_r(void) 107static inline u32 timer_time_0_r(void)
108{ 108{
109 return 0x00009400; 109 return 0x00009400U;
110} 110}
111static inline u32 timer_time_1_r(void) 111static inline u32 timer_time_1_r(void)
112{ 112{
113 return 0x00009410; 113 return 0x00009410U;
114} 114}
115#endif 115#endif