diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2017-09-25 16:33:12 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-09-27 17:17:51 -0400 |
commit | 406b73e422b6d31979b7ce0a0848a6c2025d7ebf (patch) | |
tree | cd0a3fa1e0d89ac5c54f4818540b4eb540440f26 /drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_gmmu_gp10b.h | |
parent | e7c9109f60e2d5f5570f5e3c71dcc824bb415688 (diff) |
gpu: nvgpu: gp10b: Qualify unsigned HW constants
Re-generate hardware headers so that all unsigned constants are
qualified with postfix U. This removes the need for compiler to do
implicit signed->unsigned conversions.
Change-Id: I33d46bb103d083316266eb1d325ca9f1525bf047
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1567985
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_gmmu_gp10b.h')
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_gmmu_gp10b.h | 612 |
1 files changed, 306 insertions, 306 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_gmmu_gp10b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_gmmu_gp10b.h index a6dce722..4702f575 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_gmmu_gp10b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_gmmu_gp10b.h | |||
@@ -58,1226 +58,1226 @@ | |||
58 | 58 | ||
59 | static inline u32 gmmu_new_pde_is_pte_w(void) | 59 | static inline u32 gmmu_new_pde_is_pte_w(void) |
60 | { | 60 | { |
61 | return 0; | 61 | return 0U; |
62 | } | 62 | } |
63 | static inline u32 gmmu_new_pde_is_pte_false_f(void) | 63 | static inline u32 gmmu_new_pde_is_pte_false_f(void) |
64 | { | 64 | { |
65 | return 0x0; | 65 | return 0x0U; |
66 | } | 66 | } |
67 | static inline u32 gmmu_new_pde_aperture_w(void) | 67 | static inline u32 gmmu_new_pde_aperture_w(void) |
68 | { | 68 | { |
69 | return 0; | 69 | return 0U; |
70 | } | 70 | } |
71 | static inline u32 gmmu_new_pde_aperture_invalid_f(void) | 71 | static inline u32 gmmu_new_pde_aperture_invalid_f(void) |
72 | { | 72 | { |
73 | return 0x0; | 73 | return 0x0U; |
74 | } | 74 | } |
75 | static inline u32 gmmu_new_pde_aperture_video_memory_f(void) | 75 | static inline u32 gmmu_new_pde_aperture_video_memory_f(void) |
76 | { | 76 | { |
77 | return 0x2; | 77 | return 0x2U; |
78 | } | 78 | } |
79 | static inline u32 gmmu_new_pde_aperture_sys_mem_coh_f(void) | 79 | static inline u32 gmmu_new_pde_aperture_sys_mem_coh_f(void) |
80 | { | 80 | { |
81 | return 0x4; | 81 | return 0x4U; |
82 | } | 82 | } |
83 | static inline u32 gmmu_new_pde_aperture_sys_mem_ncoh_f(void) | 83 | static inline u32 gmmu_new_pde_aperture_sys_mem_ncoh_f(void) |
84 | { | 84 | { |
85 | return 0x6; | 85 | return 0x6U; |
86 | } | 86 | } |
87 | static inline u32 gmmu_new_pde_address_sys_f(u32 v) | 87 | static inline u32 gmmu_new_pde_address_sys_f(u32 v) |
88 | { | 88 | { |
89 | return (v & 0xfffffff) << 8; | 89 | return (v & 0xfffffffU) << 8U; |
90 | } | 90 | } |
91 | static inline u32 gmmu_new_pde_address_sys_w(void) | 91 | static inline u32 gmmu_new_pde_address_sys_w(void) |
92 | { | 92 | { |
93 | return 0; | 93 | return 0U; |
94 | } | 94 | } |
95 | static inline u32 gmmu_new_pde_vol_w(void) | 95 | static inline u32 gmmu_new_pde_vol_w(void) |
96 | { | 96 | { |
97 | return 0; | 97 | return 0U; |
98 | } | 98 | } |
99 | static inline u32 gmmu_new_pde_vol_true_f(void) | 99 | static inline u32 gmmu_new_pde_vol_true_f(void) |
100 | { | 100 | { |
101 | return 0x8; | 101 | return 0x8U; |
102 | } | 102 | } |
103 | static inline u32 gmmu_new_pde_vol_false_f(void) | 103 | static inline u32 gmmu_new_pde_vol_false_f(void) |
104 | { | 104 | { |
105 | return 0x0; | 105 | return 0x0U; |
106 | } | 106 | } |
107 | static inline u32 gmmu_new_pde_address_shift_v(void) | 107 | static inline u32 gmmu_new_pde_address_shift_v(void) |
108 | { | 108 | { |
109 | return 0x0000000c; | 109 | return 0x0000000cU; |
110 | } | 110 | } |
111 | static inline u32 gmmu_new_pde__size_v(void) | 111 | static inline u32 gmmu_new_pde__size_v(void) |
112 | { | 112 | { |
113 | return 0x00000008; | 113 | return 0x00000008U; |
114 | } | 114 | } |
115 | static inline u32 gmmu_new_dual_pde_is_pte_w(void) | 115 | static inline u32 gmmu_new_dual_pde_is_pte_w(void) |
116 | { | 116 | { |
117 | return 0; | 117 | return 0U; |
118 | } | 118 | } |
119 | static inline u32 gmmu_new_dual_pde_is_pte_false_f(void) | 119 | static inline u32 gmmu_new_dual_pde_is_pte_false_f(void) |
120 | { | 120 | { |
121 | return 0x0; | 121 | return 0x0U; |
122 | } | 122 | } |
123 | static inline u32 gmmu_new_dual_pde_aperture_big_w(void) | 123 | static inline u32 gmmu_new_dual_pde_aperture_big_w(void) |
124 | { | 124 | { |
125 | return 0; | 125 | return 0U; |
126 | } | 126 | } |
127 | static inline u32 gmmu_new_dual_pde_aperture_big_invalid_f(void) | 127 | static inline u32 gmmu_new_dual_pde_aperture_big_invalid_f(void) |
128 | { | 128 | { |
129 | return 0x0; | 129 | return 0x0U; |
130 | } | 130 | } |
131 | static inline u32 gmmu_new_dual_pde_aperture_big_video_memory_f(void) | 131 | static inline u32 gmmu_new_dual_pde_aperture_big_video_memory_f(void) |
132 | { | 132 | { |
133 | return 0x2; | 133 | return 0x2U; |
134 | } | 134 | } |
135 | static inline u32 gmmu_new_dual_pde_aperture_big_sys_mem_coh_f(void) | 135 | static inline u32 gmmu_new_dual_pde_aperture_big_sys_mem_coh_f(void) |
136 | { | 136 | { |
137 | return 0x4; | 137 | return 0x4U; |
138 | } | 138 | } |
139 | static inline u32 gmmu_new_dual_pde_aperture_big_sys_mem_ncoh_f(void) | 139 | static inline u32 gmmu_new_dual_pde_aperture_big_sys_mem_ncoh_f(void) |
140 | { | 140 | { |
141 | return 0x6; | 141 | return 0x6U; |
142 | } | 142 | } |
143 | static inline u32 gmmu_new_dual_pde_address_big_sys_f(u32 v) | 143 | static inline u32 gmmu_new_dual_pde_address_big_sys_f(u32 v) |
144 | { | 144 | { |
145 | return (v & 0xfffffff) << 4; | 145 | return (v & 0xfffffffU) << 4U; |
146 | } | 146 | } |
147 | static inline u32 gmmu_new_dual_pde_address_big_sys_w(void) | 147 | static inline u32 gmmu_new_dual_pde_address_big_sys_w(void) |
148 | { | 148 | { |
149 | return 0; | 149 | return 0U; |
150 | } | 150 | } |
151 | static inline u32 gmmu_new_dual_pde_aperture_small_w(void) | 151 | static inline u32 gmmu_new_dual_pde_aperture_small_w(void) |
152 | { | 152 | { |
153 | return 2; | 153 | return 2U; |
154 | } | 154 | } |
155 | static inline u32 gmmu_new_dual_pde_aperture_small_invalid_f(void) | 155 | static inline u32 gmmu_new_dual_pde_aperture_small_invalid_f(void) |
156 | { | 156 | { |
157 | return 0x0; | 157 | return 0x0U; |
158 | } | 158 | } |
159 | static inline u32 gmmu_new_dual_pde_aperture_small_video_memory_f(void) | 159 | static inline u32 gmmu_new_dual_pde_aperture_small_video_memory_f(void) |
160 | { | 160 | { |
161 | return 0x2; | 161 | return 0x2U; |
162 | } | 162 | } |
163 | static inline u32 gmmu_new_dual_pde_aperture_small_sys_mem_coh_f(void) | 163 | static inline u32 gmmu_new_dual_pde_aperture_small_sys_mem_coh_f(void) |
164 | { | 164 | { |
165 | return 0x4; | 165 | return 0x4U; |
166 | } | 166 | } |
167 | static inline u32 gmmu_new_dual_pde_aperture_small_sys_mem_ncoh_f(void) | 167 | static inline u32 gmmu_new_dual_pde_aperture_small_sys_mem_ncoh_f(void) |
168 | { | 168 | { |
169 | return 0x6; | 169 | return 0x6U; |
170 | } | 170 | } |
171 | static inline u32 gmmu_new_dual_pde_vol_small_w(void) | 171 | static inline u32 gmmu_new_dual_pde_vol_small_w(void) |
172 | { | 172 | { |
173 | return 2; | 173 | return 2U; |
174 | } | 174 | } |
175 | static inline u32 gmmu_new_dual_pde_vol_small_true_f(void) | 175 | static inline u32 gmmu_new_dual_pde_vol_small_true_f(void) |
176 | { | 176 | { |
177 | return 0x8; | 177 | return 0x8U; |
178 | } | 178 | } |
179 | static inline u32 gmmu_new_dual_pde_vol_small_false_f(void) | 179 | static inline u32 gmmu_new_dual_pde_vol_small_false_f(void) |
180 | { | 180 | { |
181 | return 0x0; | 181 | return 0x0U; |
182 | } | 182 | } |
183 | static inline u32 gmmu_new_dual_pde_vol_big_w(void) | 183 | static inline u32 gmmu_new_dual_pde_vol_big_w(void) |
184 | { | 184 | { |
185 | return 0; | 185 | return 0U; |
186 | } | 186 | } |
187 | static inline u32 gmmu_new_dual_pde_vol_big_true_f(void) | 187 | static inline u32 gmmu_new_dual_pde_vol_big_true_f(void) |
188 | { | 188 | { |
189 | return 0x8; | 189 | return 0x8U; |
190 | } | 190 | } |
191 | static inline u32 gmmu_new_dual_pde_vol_big_false_f(void) | 191 | static inline u32 gmmu_new_dual_pde_vol_big_false_f(void) |
192 | { | 192 | { |
193 | return 0x0; | 193 | return 0x0U; |
194 | } | 194 | } |
195 | static inline u32 gmmu_new_dual_pde_address_small_sys_f(u32 v) | 195 | static inline u32 gmmu_new_dual_pde_address_small_sys_f(u32 v) |
196 | { | 196 | { |
197 | return (v & 0xfffffff) << 8; | 197 | return (v & 0xfffffffU) << 8U; |
198 | } | 198 | } |
199 | static inline u32 gmmu_new_dual_pde_address_small_sys_w(void) | 199 | static inline u32 gmmu_new_dual_pde_address_small_sys_w(void) |
200 | { | 200 | { |
201 | return 2; | 201 | return 2U; |
202 | } | 202 | } |
203 | static inline u32 gmmu_new_dual_pde_address_shift_v(void) | 203 | static inline u32 gmmu_new_dual_pde_address_shift_v(void) |
204 | { | 204 | { |
205 | return 0x0000000c; | 205 | return 0x0000000cU; |
206 | } | 206 | } |
207 | static inline u32 gmmu_new_dual_pde_address_big_shift_v(void) | 207 | static inline u32 gmmu_new_dual_pde_address_big_shift_v(void) |
208 | { | 208 | { |
209 | return 0x00000008; | 209 | return 0x00000008U; |
210 | } | 210 | } |
211 | static inline u32 gmmu_new_dual_pde__size_v(void) | 211 | static inline u32 gmmu_new_dual_pde__size_v(void) |
212 | { | 212 | { |
213 | return 0x00000010; | 213 | return 0x00000010U; |
214 | } | 214 | } |
215 | static inline u32 gmmu_new_pte__size_v(void) | 215 | static inline u32 gmmu_new_pte__size_v(void) |
216 | { | 216 | { |
217 | return 0x00000008; | 217 | return 0x00000008U; |
218 | } | 218 | } |
219 | static inline u32 gmmu_new_pte_valid_w(void) | 219 | static inline u32 gmmu_new_pte_valid_w(void) |
220 | { | 220 | { |
221 | return 0; | 221 | return 0U; |
222 | } | 222 | } |
223 | static inline u32 gmmu_new_pte_valid_true_f(void) | 223 | static inline u32 gmmu_new_pte_valid_true_f(void) |
224 | { | 224 | { |
225 | return 0x1; | 225 | return 0x1U; |
226 | } | 226 | } |
227 | static inline u32 gmmu_new_pte_valid_false_f(void) | 227 | static inline u32 gmmu_new_pte_valid_false_f(void) |
228 | { | 228 | { |
229 | return 0x0; | 229 | return 0x0U; |
230 | } | 230 | } |
231 | static inline u32 gmmu_new_pte_privilege_w(void) | 231 | static inline u32 gmmu_new_pte_privilege_w(void) |
232 | { | 232 | { |
233 | return 0; | 233 | return 0U; |
234 | } | 234 | } |
235 | static inline u32 gmmu_new_pte_privilege_true_f(void) | 235 | static inline u32 gmmu_new_pte_privilege_true_f(void) |
236 | { | 236 | { |
237 | return 0x20; | 237 | return 0x20U; |
238 | } | 238 | } |
239 | static inline u32 gmmu_new_pte_privilege_false_f(void) | 239 | static inline u32 gmmu_new_pte_privilege_false_f(void) |
240 | { | 240 | { |
241 | return 0x0; | 241 | return 0x0U; |
242 | } | 242 | } |
243 | static inline u32 gmmu_new_pte_address_sys_f(u32 v) | 243 | static inline u32 gmmu_new_pte_address_sys_f(u32 v) |
244 | { | 244 | { |
245 | return (v & 0xfffffff) << 8; | 245 | return (v & 0xfffffffU) << 8U; |
246 | } | 246 | } |
247 | static inline u32 gmmu_new_pte_address_sys_w(void) | 247 | static inline u32 gmmu_new_pte_address_sys_w(void) |
248 | { | 248 | { |
249 | return 0; | 249 | return 0U; |
250 | } | 250 | } |
251 | static inline u32 gmmu_new_pte_address_vid_f(u32 v) | 251 | static inline u32 gmmu_new_pte_address_vid_f(u32 v) |
252 | { | 252 | { |
253 | return (v & 0xffffff) << 8; | 253 | return (v & 0xffffffU) << 8U; |
254 | } | 254 | } |
255 | static inline u32 gmmu_new_pte_address_vid_w(void) | 255 | static inline u32 gmmu_new_pte_address_vid_w(void) |
256 | { | 256 | { |
257 | return 0; | 257 | return 0U; |
258 | } | 258 | } |
259 | static inline u32 gmmu_new_pte_vol_w(void) | 259 | static inline u32 gmmu_new_pte_vol_w(void) |
260 | { | 260 | { |
261 | return 0; | 261 | return 0U; |
262 | } | 262 | } |
263 | static inline u32 gmmu_new_pte_vol_true_f(void) | 263 | static inline u32 gmmu_new_pte_vol_true_f(void) |
264 | { | 264 | { |
265 | return 0x8; | 265 | return 0x8U; |
266 | } | 266 | } |
267 | static inline u32 gmmu_new_pte_vol_false_f(void) | 267 | static inline u32 gmmu_new_pte_vol_false_f(void) |
268 | { | 268 | { |
269 | return 0x0; | 269 | return 0x0U; |
270 | } | 270 | } |
271 | static inline u32 gmmu_new_pte_aperture_w(void) | 271 | static inline u32 gmmu_new_pte_aperture_w(void) |
272 | { | 272 | { |
273 | return 0; | 273 | return 0U; |
274 | } | 274 | } |
275 | static inline u32 gmmu_new_pte_aperture_video_memory_f(void) | 275 | static inline u32 gmmu_new_pte_aperture_video_memory_f(void) |
276 | { | 276 | { |
277 | return 0x0; | 277 | return 0x0U; |
278 | } | 278 | } |
279 | static inline u32 gmmu_new_pte_aperture_sys_mem_coh_f(void) | 279 | static inline u32 gmmu_new_pte_aperture_sys_mem_coh_f(void) |
280 | { | 280 | { |
281 | return 0x4; | 281 | return 0x4U; |
282 | } | 282 | } |
283 | static inline u32 gmmu_new_pte_aperture_sys_mem_ncoh_f(void) | 283 | static inline u32 gmmu_new_pte_aperture_sys_mem_ncoh_f(void) |
284 | { | 284 | { |
285 | return 0x6; | 285 | return 0x6U; |
286 | } | 286 | } |
287 | static inline u32 gmmu_new_pte_read_only_w(void) | 287 | static inline u32 gmmu_new_pte_read_only_w(void) |
288 | { | 288 | { |
289 | return 0; | 289 | return 0U; |
290 | } | 290 | } |
291 | static inline u32 gmmu_new_pte_read_only_true_f(void) | 291 | static inline u32 gmmu_new_pte_read_only_true_f(void) |
292 | { | 292 | { |
293 | return 0x40; | 293 | return 0x40U; |
294 | } | 294 | } |
295 | static inline u32 gmmu_new_pte_comptagline_f(u32 v) | 295 | static inline u32 gmmu_new_pte_comptagline_f(u32 v) |
296 | { | 296 | { |
297 | return (v & 0x3ffff) << 4; | 297 | return (v & 0x3ffffU) << 4U; |
298 | } | 298 | } |
299 | static inline u32 gmmu_new_pte_comptagline_w(void) | 299 | static inline u32 gmmu_new_pte_comptagline_w(void) |
300 | { | 300 | { |
301 | return 1; | 301 | return 1U; |
302 | } | 302 | } |
303 | static inline u32 gmmu_new_pte_kind_f(u32 v) | 303 | static inline u32 gmmu_new_pte_kind_f(u32 v) |
304 | { | 304 | { |
305 | return (v & 0xff) << 24; | 305 | return (v & 0xffU) << 24U; |
306 | } | 306 | } |
307 | static inline u32 gmmu_new_pte_kind_w(void) | 307 | static inline u32 gmmu_new_pte_kind_w(void) |
308 | { | 308 | { |
309 | return 1; | 309 | return 1U; |
310 | } | 310 | } |
311 | static inline u32 gmmu_new_pte_address_shift_v(void) | 311 | static inline u32 gmmu_new_pte_address_shift_v(void) |
312 | { | 312 | { |
313 | return 0x0000000c; | 313 | return 0x0000000cU; |
314 | } | 314 | } |
315 | static inline u32 gmmu_pte_kind_f(u32 v) | 315 | static inline u32 gmmu_pte_kind_f(u32 v) |
316 | { | 316 | { |
317 | return (v & 0xff) << 4; | 317 | return (v & 0xffU) << 4U; |
318 | } | 318 | } |
319 | static inline u32 gmmu_pte_kind_w(void) | 319 | static inline u32 gmmu_pte_kind_w(void) |
320 | { | 320 | { |
321 | return 1; | 321 | return 1U; |
322 | } | 322 | } |
323 | static inline u32 gmmu_pte_kind_invalid_v(void) | 323 | static inline u32 gmmu_pte_kind_invalid_v(void) |
324 | { | 324 | { |
325 | return 0x000000ff; | 325 | return 0x000000ffU; |
326 | } | 326 | } |
327 | static inline u32 gmmu_pte_kind_pitch_v(void) | 327 | static inline u32 gmmu_pte_kind_pitch_v(void) |
328 | { | 328 | { |
329 | return 0x00000000; | 329 | return 0x00000000U; |
330 | } | 330 | } |
331 | static inline u32 gmmu_pte_kind_z16_v(void) | 331 | static inline u32 gmmu_pte_kind_z16_v(void) |
332 | { | 332 | { |
333 | return 0x00000001; | 333 | return 0x00000001U; |
334 | } | 334 | } |
335 | static inline u32 gmmu_pte_kind_z16_2c_v(void) | 335 | static inline u32 gmmu_pte_kind_z16_2c_v(void) |
336 | { | 336 | { |
337 | return 0x00000002; | 337 | return 0x00000002U; |
338 | } | 338 | } |
339 | static inline u32 gmmu_pte_kind_z16_ms2_2c_v(void) | 339 | static inline u32 gmmu_pte_kind_z16_ms2_2c_v(void) |
340 | { | 340 | { |
341 | return 0x00000003; | 341 | return 0x00000003U; |
342 | } | 342 | } |
343 | static inline u32 gmmu_pte_kind_z16_ms4_2c_v(void) | 343 | static inline u32 gmmu_pte_kind_z16_ms4_2c_v(void) |
344 | { | 344 | { |
345 | return 0x00000004; | 345 | return 0x00000004U; |
346 | } | 346 | } |
347 | static inline u32 gmmu_pte_kind_z16_ms8_2c_v(void) | 347 | static inline u32 gmmu_pte_kind_z16_ms8_2c_v(void) |
348 | { | 348 | { |
349 | return 0x00000005; | 349 | return 0x00000005U; |
350 | } | 350 | } |
351 | static inline u32 gmmu_pte_kind_z16_ms16_2c_v(void) | 351 | static inline u32 gmmu_pte_kind_z16_ms16_2c_v(void) |
352 | { | 352 | { |
353 | return 0x00000006; | 353 | return 0x00000006U; |
354 | } | 354 | } |
355 | static inline u32 gmmu_pte_kind_z16_2z_v(void) | 355 | static inline u32 gmmu_pte_kind_z16_2z_v(void) |
356 | { | 356 | { |
357 | return 0x00000007; | 357 | return 0x00000007U; |
358 | } | 358 | } |
359 | static inline u32 gmmu_pte_kind_z16_ms2_2z_v(void) | 359 | static inline u32 gmmu_pte_kind_z16_ms2_2z_v(void) |
360 | { | 360 | { |
361 | return 0x00000008; | 361 | return 0x00000008U; |
362 | } | 362 | } |
363 | static inline u32 gmmu_pte_kind_z16_ms4_2z_v(void) | 363 | static inline u32 gmmu_pte_kind_z16_ms4_2z_v(void) |
364 | { | 364 | { |
365 | return 0x00000009; | 365 | return 0x00000009U; |
366 | } | 366 | } |
367 | static inline u32 gmmu_pte_kind_z16_ms8_2z_v(void) | 367 | static inline u32 gmmu_pte_kind_z16_ms8_2z_v(void) |
368 | { | 368 | { |
369 | return 0x0000000a; | 369 | return 0x0000000aU; |
370 | } | 370 | } |
371 | static inline u32 gmmu_pte_kind_z16_ms16_2z_v(void) | 371 | static inline u32 gmmu_pte_kind_z16_ms16_2z_v(void) |
372 | { | 372 | { |
373 | return 0x0000000b; | 373 | return 0x0000000bU; |
374 | } | 374 | } |
375 | static inline u32 gmmu_pte_kind_z16_2cz_v(void) | 375 | static inline u32 gmmu_pte_kind_z16_2cz_v(void) |
376 | { | 376 | { |
377 | return 0x00000036; | 377 | return 0x00000036U; |
378 | } | 378 | } |
379 | static inline u32 gmmu_pte_kind_z16_ms2_2cz_v(void) | 379 | static inline u32 gmmu_pte_kind_z16_ms2_2cz_v(void) |
380 | { | 380 | { |
381 | return 0x00000037; | 381 | return 0x00000037U; |
382 | } | 382 | } |
383 | static inline u32 gmmu_pte_kind_z16_ms4_2cz_v(void) | 383 | static inline u32 gmmu_pte_kind_z16_ms4_2cz_v(void) |
384 | { | 384 | { |
385 | return 0x00000038; | 385 | return 0x00000038U; |
386 | } | 386 | } |
387 | static inline u32 gmmu_pte_kind_z16_ms8_2cz_v(void) | 387 | static inline u32 gmmu_pte_kind_z16_ms8_2cz_v(void) |
388 | { | 388 | { |
389 | return 0x00000039; | 389 | return 0x00000039U; |
390 | } | 390 | } |
391 | static inline u32 gmmu_pte_kind_z16_ms16_2cz_v(void) | 391 | static inline u32 gmmu_pte_kind_z16_ms16_2cz_v(void) |
392 | { | 392 | { |
393 | return 0x0000005f; | 393 | return 0x0000005fU; |
394 | } | 394 | } |
395 | static inline u32 gmmu_pte_kind_z16_4cz_v(void) | 395 | static inline u32 gmmu_pte_kind_z16_4cz_v(void) |
396 | { | 396 | { |
397 | return 0x0000000c; | 397 | return 0x0000000cU; |
398 | } | 398 | } |
399 | static inline u32 gmmu_pte_kind_z16_ms2_4cz_v(void) | 399 | static inline u32 gmmu_pte_kind_z16_ms2_4cz_v(void) |
400 | { | 400 | { |
401 | return 0x0000000d; | 401 | return 0x0000000dU; |
402 | } | 402 | } |
403 | static inline u32 gmmu_pte_kind_z16_ms4_4cz_v(void) | 403 | static inline u32 gmmu_pte_kind_z16_ms4_4cz_v(void) |
404 | { | 404 | { |
405 | return 0x0000000e; | 405 | return 0x0000000eU; |
406 | } | 406 | } |
407 | static inline u32 gmmu_pte_kind_z16_ms8_4cz_v(void) | 407 | static inline u32 gmmu_pte_kind_z16_ms8_4cz_v(void) |
408 | { | 408 | { |
409 | return 0x0000000f; | 409 | return 0x0000000fU; |
410 | } | 410 | } |
411 | static inline u32 gmmu_pte_kind_z16_ms16_4cz_v(void) | 411 | static inline u32 gmmu_pte_kind_z16_ms16_4cz_v(void) |
412 | { | 412 | { |
413 | return 0x00000010; | 413 | return 0x00000010U; |
414 | } | 414 | } |
415 | static inline u32 gmmu_pte_kind_s8z24_v(void) | 415 | static inline u32 gmmu_pte_kind_s8z24_v(void) |
416 | { | 416 | { |
417 | return 0x00000011; | 417 | return 0x00000011U; |
418 | } | 418 | } |
419 | static inline u32 gmmu_pte_kind_s8z24_1z_v(void) | 419 | static inline u32 gmmu_pte_kind_s8z24_1z_v(void) |
420 | { | 420 | { |
421 | return 0x00000012; | 421 | return 0x00000012U; |
422 | } | 422 | } |
423 | static inline u32 gmmu_pte_kind_s8z24_ms2_1z_v(void) | 423 | static inline u32 gmmu_pte_kind_s8z24_ms2_1z_v(void) |
424 | { | 424 | { |
425 | return 0x00000013; | 425 | return 0x00000013U; |
426 | } | 426 | } |
427 | static inline u32 gmmu_pte_kind_s8z24_ms4_1z_v(void) | 427 | static inline u32 gmmu_pte_kind_s8z24_ms4_1z_v(void) |
428 | { | 428 | { |
429 | return 0x00000014; | 429 | return 0x00000014U; |
430 | } | 430 | } |
431 | static inline u32 gmmu_pte_kind_s8z24_ms8_1z_v(void) | 431 | static inline u32 gmmu_pte_kind_s8z24_ms8_1z_v(void) |
432 | { | 432 | { |
433 | return 0x00000015; | 433 | return 0x00000015U; |
434 | } | 434 | } |
435 | static inline u32 gmmu_pte_kind_s8z24_ms16_1z_v(void) | 435 | static inline u32 gmmu_pte_kind_s8z24_ms16_1z_v(void) |
436 | { | 436 | { |
437 | return 0x00000016; | 437 | return 0x00000016U; |
438 | } | 438 | } |
439 | static inline u32 gmmu_pte_kind_s8z24_2cz_v(void) | 439 | static inline u32 gmmu_pte_kind_s8z24_2cz_v(void) |
440 | { | 440 | { |
441 | return 0x00000017; | 441 | return 0x00000017U; |
442 | } | 442 | } |
443 | static inline u32 gmmu_pte_kind_s8z24_ms2_2cz_v(void) | 443 | static inline u32 gmmu_pte_kind_s8z24_ms2_2cz_v(void) |
444 | { | 444 | { |
445 | return 0x00000018; | 445 | return 0x00000018U; |
446 | } | 446 | } |
447 | static inline u32 gmmu_pte_kind_s8z24_ms4_2cz_v(void) | 447 | static inline u32 gmmu_pte_kind_s8z24_ms4_2cz_v(void) |
448 | { | 448 | { |
449 | return 0x00000019; | 449 | return 0x00000019U; |
450 | } | 450 | } |
451 | static inline u32 gmmu_pte_kind_s8z24_ms8_2cz_v(void) | 451 | static inline u32 gmmu_pte_kind_s8z24_ms8_2cz_v(void) |
452 | { | 452 | { |
453 | return 0x0000001a; | 453 | return 0x0000001aU; |
454 | } | 454 | } |
455 | static inline u32 gmmu_pte_kind_s8z24_ms16_2cz_v(void) | 455 | static inline u32 gmmu_pte_kind_s8z24_ms16_2cz_v(void) |
456 | { | 456 | { |
457 | return 0x0000001b; | 457 | return 0x0000001bU; |
458 | } | 458 | } |
459 | static inline u32 gmmu_pte_kind_s8z24_2cs_v(void) | 459 | static inline u32 gmmu_pte_kind_s8z24_2cs_v(void) |
460 | { | 460 | { |
461 | return 0x0000001c; | 461 | return 0x0000001cU; |
462 | } | 462 | } |
463 | static inline u32 gmmu_pte_kind_s8z24_ms2_2cs_v(void) | 463 | static inline u32 gmmu_pte_kind_s8z24_ms2_2cs_v(void) |
464 | { | 464 | { |
465 | return 0x0000001d; | 465 | return 0x0000001dU; |
466 | } | 466 | } |
467 | static inline u32 gmmu_pte_kind_s8z24_ms4_2cs_v(void) | 467 | static inline u32 gmmu_pte_kind_s8z24_ms4_2cs_v(void) |
468 | { | 468 | { |
469 | return 0x0000001e; | 469 | return 0x0000001eU; |
470 | } | 470 | } |
471 | static inline u32 gmmu_pte_kind_s8z24_ms8_2cs_v(void) | 471 | static inline u32 gmmu_pte_kind_s8z24_ms8_2cs_v(void) |
472 | { | 472 | { |
473 | return 0x0000001f; | 473 | return 0x0000001fU; |
474 | } | 474 | } |
475 | static inline u32 gmmu_pte_kind_s8z24_ms16_2cs_v(void) | 475 | static inline u32 gmmu_pte_kind_s8z24_ms16_2cs_v(void) |
476 | { | 476 | { |
477 | return 0x00000020; | 477 | return 0x00000020U; |
478 | } | 478 | } |
479 | static inline u32 gmmu_pte_kind_s8z24_4cszv_v(void) | 479 | static inline u32 gmmu_pte_kind_s8z24_4cszv_v(void) |
480 | { | 480 | { |
481 | return 0x00000021; | 481 | return 0x00000021U; |
482 | } | 482 | } |
483 | static inline u32 gmmu_pte_kind_s8z24_ms2_4cszv_v(void) | 483 | static inline u32 gmmu_pte_kind_s8z24_ms2_4cszv_v(void) |
484 | { | 484 | { |
485 | return 0x00000022; | 485 | return 0x00000022U; |
486 | } | 486 | } |
487 | static inline u32 gmmu_pte_kind_s8z24_ms4_4cszv_v(void) | 487 | static inline u32 gmmu_pte_kind_s8z24_ms4_4cszv_v(void) |
488 | { | 488 | { |
489 | return 0x00000023; | 489 | return 0x00000023U; |
490 | } | 490 | } |
491 | static inline u32 gmmu_pte_kind_s8z24_ms8_4cszv_v(void) | 491 | static inline u32 gmmu_pte_kind_s8z24_ms8_4cszv_v(void) |
492 | { | 492 | { |
493 | return 0x00000024; | 493 | return 0x00000024U; |
494 | } | 494 | } |
495 | static inline u32 gmmu_pte_kind_s8z24_ms16_4cszv_v(void) | 495 | static inline u32 gmmu_pte_kind_s8z24_ms16_4cszv_v(void) |
496 | { | 496 | { |
497 | return 0x00000025; | 497 | return 0x00000025U; |
498 | } | 498 | } |
499 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_v(void) | 499 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_v(void) |
500 | { | 500 | { |
501 | return 0x00000026; | 501 | return 0x00000026U; |
502 | } | 502 | } |
503 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_v(void) | 503 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_v(void) |
504 | { | 504 | { |
505 | return 0x00000027; | 505 | return 0x00000027U; |
506 | } | 506 | } |
507 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_v(void) | 507 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_v(void) |
508 | { | 508 | { |
509 | return 0x00000028; | 509 | return 0x00000028U; |
510 | } | 510 | } |
511 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_v(void) | 511 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_v(void) |
512 | { | 512 | { |
513 | return 0x00000029; | 513 | return 0x00000029U; |
514 | } | 514 | } |
515 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_1zv_v(void) | 515 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_1zv_v(void) |
516 | { | 516 | { |
517 | return 0x0000002e; | 517 | return 0x0000002eU; |
518 | } | 518 | } |
519 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_1zv_v(void) | 519 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_1zv_v(void) |
520 | { | 520 | { |
521 | return 0x0000002f; | 521 | return 0x0000002fU; |
522 | } | 522 | } |
523 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_1zv_v(void) | 523 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_1zv_v(void) |
524 | { | 524 | { |
525 | return 0x00000030; | 525 | return 0x00000030U; |
526 | } | 526 | } |
527 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_1zv_v(void) | 527 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_1zv_v(void) |
528 | { | 528 | { |
529 | return 0x00000031; | 529 | return 0x00000031U; |
530 | } | 530 | } |
531 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_2cs_v(void) | 531 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_2cs_v(void) |
532 | { | 532 | { |
533 | return 0x00000032; | 533 | return 0x00000032U; |
534 | } | 534 | } |
535 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_2cs_v(void) | 535 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_2cs_v(void) |
536 | { | 536 | { |
537 | return 0x00000033; | 537 | return 0x00000033U; |
538 | } | 538 | } |
539 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_2cs_v(void) | 539 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_2cs_v(void) |
540 | { | 540 | { |
541 | return 0x00000034; | 541 | return 0x00000034U; |
542 | } | 542 | } |
543 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_2cs_v(void) | 543 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_2cs_v(void) |
544 | { | 544 | { |
545 | return 0x00000035; | 545 | return 0x00000035U; |
546 | } | 546 | } |
547 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_2czv_v(void) | 547 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_2czv_v(void) |
548 | { | 548 | { |
549 | return 0x0000003a; | 549 | return 0x0000003aU; |
550 | } | 550 | } |
551 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_2czv_v(void) | 551 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_2czv_v(void) |
552 | { | 552 | { |
553 | return 0x0000003b; | 553 | return 0x0000003bU; |
554 | } | 554 | } |
555 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_2czv_v(void) | 555 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_2czv_v(void) |
556 | { | 556 | { |
557 | return 0x0000003c; | 557 | return 0x0000003cU; |
558 | } | 558 | } |
559 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_2czv_v(void) | 559 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_2czv_v(void) |
560 | { | 560 | { |
561 | return 0x0000003d; | 561 | return 0x0000003dU; |
562 | } | 562 | } |
563 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_2zv_v(void) | 563 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_2zv_v(void) |
564 | { | 564 | { |
565 | return 0x0000003e; | 565 | return 0x0000003eU; |
566 | } | 566 | } |
567 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_2zv_v(void) | 567 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_2zv_v(void) |
568 | { | 568 | { |
569 | return 0x0000003f; | 569 | return 0x0000003fU; |
570 | } | 570 | } |
571 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_2zv_v(void) | 571 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_2zv_v(void) |
572 | { | 572 | { |
573 | return 0x00000040; | 573 | return 0x00000040U; |
574 | } | 574 | } |
575 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_2zv_v(void) | 575 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_2zv_v(void) |
576 | { | 576 | { |
577 | return 0x00000041; | 577 | return 0x00000041U; |
578 | } | 578 | } |
579 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_4cszv_v(void) | 579 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc12_4cszv_v(void) |
580 | { | 580 | { |
581 | return 0x00000042; | 581 | return 0x00000042U; |
582 | } | 582 | } |
583 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_4cszv_v(void) | 583 | static inline u32 gmmu_pte_kind_v8z24_ms4_vc4_4cszv_v(void) |
584 | { | 584 | { |
585 | return 0x00000043; | 585 | return 0x00000043U; |
586 | } | 586 | } |
587 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_4cszv_v(void) | 587 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc8_4cszv_v(void) |
588 | { | 588 | { |
589 | return 0x00000044; | 589 | return 0x00000044U; |
590 | } | 590 | } |
591 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_4cszv_v(void) | 591 | static inline u32 gmmu_pte_kind_v8z24_ms8_vc24_4cszv_v(void) |
592 | { | 592 | { |
593 | return 0x00000045; | 593 | return 0x00000045U; |
594 | } | 594 | } |
595 | static inline u32 gmmu_pte_kind_z24s8_v(void) | 595 | static inline u32 gmmu_pte_kind_z24s8_v(void) |
596 | { | 596 | { |
597 | return 0x00000046; | 597 | return 0x00000046U; |
598 | } | 598 | } |
599 | static inline u32 gmmu_pte_kind_z24s8_1z_v(void) | 599 | static inline u32 gmmu_pte_kind_z24s8_1z_v(void) |
600 | { | 600 | { |
601 | return 0x00000047; | 601 | return 0x00000047U; |
602 | } | 602 | } |
603 | static inline u32 gmmu_pte_kind_z24s8_ms2_1z_v(void) | 603 | static inline u32 gmmu_pte_kind_z24s8_ms2_1z_v(void) |
604 | { | 604 | { |
605 | return 0x00000048; | 605 | return 0x00000048U; |
606 | } | 606 | } |
607 | static inline u32 gmmu_pte_kind_z24s8_ms4_1z_v(void) | 607 | static inline u32 gmmu_pte_kind_z24s8_ms4_1z_v(void) |
608 | { | 608 | { |
609 | return 0x00000049; | 609 | return 0x00000049U; |
610 | } | 610 | } |
611 | static inline u32 gmmu_pte_kind_z24s8_ms8_1z_v(void) | 611 | static inline u32 gmmu_pte_kind_z24s8_ms8_1z_v(void) |
612 | { | 612 | { |
613 | return 0x0000004a; | 613 | return 0x0000004aU; |
614 | } | 614 | } |
615 | static inline u32 gmmu_pte_kind_z24s8_ms16_1z_v(void) | 615 | static inline u32 gmmu_pte_kind_z24s8_ms16_1z_v(void) |
616 | { | 616 | { |
617 | return 0x0000004b; | 617 | return 0x0000004bU; |
618 | } | 618 | } |
619 | static inline u32 gmmu_pte_kind_z24s8_2cs_v(void) | 619 | static inline u32 gmmu_pte_kind_z24s8_2cs_v(void) |
620 | { | 620 | { |
621 | return 0x0000004c; | 621 | return 0x0000004cU; |
622 | } | 622 | } |
623 | static inline u32 gmmu_pte_kind_z24s8_ms2_2cs_v(void) | 623 | static inline u32 gmmu_pte_kind_z24s8_ms2_2cs_v(void) |
624 | { | 624 | { |
625 | return 0x0000004d; | 625 | return 0x0000004dU; |
626 | } | 626 | } |
627 | static inline u32 gmmu_pte_kind_z24s8_ms4_2cs_v(void) | 627 | static inline u32 gmmu_pte_kind_z24s8_ms4_2cs_v(void) |
628 | { | 628 | { |
629 | return 0x0000004e; | 629 | return 0x0000004eU; |
630 | } | 630 | } |
631 | static inline u32 gmmu_pte_kind_z24s8_ms8_2cs_v(void) | 631 | static inline u32 gmmu_pte_kind_z24s8_ms8_2cs_v(void) |
632 | { | 632 | { |
633 | return 0x0000004f; | 633 | return 0x0000004fU; |
634 | } | 634 | } |
635 | static inline u32 gmmu_pte_kind_z24s8_ms16_2cs_v(void) | 635 | static inline u32 gmmu_pte_kind_z24s8_ms16_2cs_v(void) |
636 | { | 636 | { |
637 | return 0x00000050; | 637 | return 0x00000050U; |
638 | } | 638 | } |
639 | static inline u32 gmmu_pte_kind_z24s8_2cz_v(void) | 639 | static inline u32 gmmu_pte_kind_z24s8_2cz_v(void) |
640 | { | 640 | { |
641 | return 0x00000051; | 641 | return 0x00000051U; |
642 | } | 642 | } |
643 | static inline u32 gmmu_pte_kind_z24s8_ms2_2cz_v(void) | 643 | static inline u32 gmmu_pte_kind_z24s8_ms2_2cz_v(void) |
644 | { | 644 | { |
645 | return 0x00000052; | 645 | return 0x00000052U; |
646 | } | 646 | } |
647 | static inline u32 gmmu_pte_kind_z24s8_ms4_2cz_v(void) | 647 | static inline u32 gmmu_pte_kind_z24s8_ms4_2cz_v(void) |
648 | { | 648 | { |
649 | return 0x00000053; | 649 | return 0x00000053U; |
650 | } | 650 | } |
651 | static inline u32 gmmu_pte_kind_z24s8_ms8_2cz_v(void) | 651 | static inline u32 gmmu_pte_kind_z24s8_ms8_2cz_v(void) |
652 | { | 652 | { |
653 | return 0x00000054; | 653 | return 0x00000054U; |
654 | } | 654 | } |
655 | static inline u32 gmmu_pte_kind_z24s8_ms16_2cz_v(void) | 655 | static inline u32 gmmu_pte_kind_z24s8_ms16_2cz_v(void) |
656 | { | 656 | { |
657 | return 0x00000055; | 657 | return 0x00000055U; |
658 | } | 658 | } |
659 | static inline u32 gmmu_pte_kind_z24s8_4cszv_v(void) | 659 | static inline u32 gmmu_pte_kind_z24s8_4cszv_v(void) |
660 | { | 660 | { |
661 | return 0x00000056; | 661 | return 0x00000056U; |
662 | } | 662 | } |
663 | static inline u32 gmmu_pte_kind_z24s8_ms2_4cszv_v(void) | 663 | static inline u32 gmmu_pte_kind_z24s8_ms2_4cszv_v(void) |
664 | { | 664 | { |
665 | return 0x00000057; | 665 | return 0x00000057U; |
666 | } | 666 | } |
667 | static inline u32 gmmu_pte_kind_z24s8_ms4_4cszv_v(void) | 667 | static inline u32 gmmu_pte_kind_z24s8_ms4_4cszv_v(void) |
668 | { | 668 | { |
669 | return 0x00000058; | 669 | return 0x00000058U; |
670 | } | 670 | } |
671 | static inline u32 gmmu_pte_kind_z24s8_ms8_4cszv_v(void) | 671 | static inline u32 gmmu_pte_kind_z24s8_ms8_4cszv_v(void) |
672 | { | 672 | { |
673 | return 0x00000059; | 673 | return 0x00000059U; |
674 | } | 674 | } |
675 | static inline u32 gmmu_pte_kind_z24s8_ms16_4cszv_v(void) | 675 | static inline u32 gmmu_pte_kind_z24s8_ms16_4cszv_v(void) |
676 | { | 676 | { |
677 | return 0x0000005a; | 677 | return 0x0000005aU; |
678 | } | 678 | } |
679 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_v(void) | 679 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_v(void) |
680 | { | 680 | { |
681 | return 0x0000005b; | 681 | return 0x0000005bU; |
682 | } | 682 | } |
683 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_v(void) | 683 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_v(void) |
684 | { | 684 | { |
685 | return 0x0000005c; | 685 | return 0x0000005cU; |
686 | } | 686 | } |
687 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_v(void) | 687 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_v(void) |
688 | { | 688 | { |
689 | return 0x0000005d; | 689 | return 0x0000005dU; |
690 | } | 690 | } |
691 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_v(void) | 691 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_v(void) |
692 | { | 692 | { |
693 | return 0x0000005e; | 693 | return 0x0000005eU; |
694 | } | 694 | } |
695 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_1zv_v(void) | 695 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_1zv_v(void) |
696 | { | 696 | { |
697 | return 0x00000063; | 697 | return 0x00000063U; |
698 | } | 698 | } |
699 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_1zv_v(void) | 699 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_1zv_v(void) |
700 | { | 700 | { |
701 | return 0x00000064; | 701 | return 0x00000064U; |
702 | } | 702 | } |
703 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_1zv_v(void) | 703 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_1zv_v(void) |
704 | { | 704 | { |
705 | return 0x00000065; | 705 | return 0x00000065U; |
706 | } | 706 | } |
707 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_1zv_v(void) | 707 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_1zv_v(void) |
708 | { | 708 | { |
709 | return 0x00000066; | 709 | return 0x00000066U; |
710 | } | 710 | } |
711 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_2cs_v(void) | 711 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_2cs_v(void) |
712 | { | 712 | { |
713 | return 0x00000067; | 713 | return 0x00000067U; |
714 | } | 714 | } |
715 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_2cs_v(void) | 715 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_2cs_v(void) |
716 | { | 716 | { |
717 | return 0x00000068; | 717 | return 0x00000068U; |
718 | } | 718 | } |
719 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_2cs_v(void) | 719 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_2cs_v(void) |
720 | { | 720 | { |
721 | return 0x00000069; | 721 | return 0x00000069U; |
722 | } | 722 | } |
723 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_2cs_v(void) | 723 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_2cs_v(void) |
724 | { | 724 | { |
725 | return 0x0000006a; | 725 | return 0x0000006aU; |
726 | } | 726 | } |
727 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_2czv_v(void) | 727 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_2czv_v(void) |
728 | { | 728 | { |
729 | return 0x0000006f; | 729 | return 0x0000006fU; |
730 | } | 730 | } |
731 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_2czv_v(void) | 731 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_2czv_v(void) |
732 | { | 732 | { |
733 | return 0x00000070; | 733 | return 0x00000070U; |
734 | } | 734 | } |
735 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_2czv_v(void) | 735 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_2czv_v(void) |
736 | { | 736 | { |
737 | return 0x00000071; | 737 | return 0x00000071U; |
738 | } | 738 | } |
739 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_2czv_v(void) | 739 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_2czv_v(void) |
740 | { | 740 | { |
741 | return 0x00000072; | 741 | return 0x00000072U; |
742 | } | 742 | } |
743 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_2zv_v(void) | 743 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_2zv_v(void) |
744 | { | 744 | { |
745 | return 0x00000073; | 745 | return 0x00000073U; |
746 | } | 746 | } |
747 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_2zv_v(void) | 747 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_2zv_v(void) |
748 | { | 748 | { |
749 | return 0x00000074; | 749 | return 0x00000074U; |
750 | } | 750 | } |
751 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_2zv_v(void) | 751 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_2zv_v(void) |
752 | { | 752 | { |
753 | return 0x00000075; | 753 | return 0x00000075U; |
754 | } | 754 | } |
755 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_2zv_v(void) | 755 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_2zv_v(void) |
756 | { | 756 | { |
757 | return 0x00000076; | 757 | return 0x00000076U; |
758 | } | 758 | } |
759 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_4cszv_v(void) | 759 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc12_4cszv_v(void) |
760 | { | 760 | { |
761 | return 0x00000077; | 761 | return 0x00000077U; |
762 | } | 762 | } |
763 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_4cszv_v(void) | 763 | static inline u32 gmmu_pte_kind_z24v8_ms4_vc4_4cszv_v(void) |
764 | { | 764 | { |
765 | return 0x00000078; | 765 | return 0x00000078U; |
766 | } | 766 | } |
767 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_4cszv_v(void) | 767 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc8_4cszv_v(void) |
768 | { | 768 | { |
769 | return 0x00000079; | 769 | return 0x00000079U; |
770 | } | 770 | } |
771 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_4cszv_v(void) | 771 | static inline u32 gmmu_pte_kind_z24v8_ms8_vc24_4cszv_v(void) |
772 | { | 772 | { |
773 | return 0x0000007a; | 773 | return 0x0000007aU; |
774 | } | 774 | } |
775 | static inline u32 gmmu_pte_kind_zf32_v(void) | 775 | static inline u32 gmmu_pte_kind_zf32_v(void) |
776 | { | 776 | { |
777 | return 0x0000007b; | 777 | return 0x0000007bU; |
778 | } | 778 | } |
779 | static inline u32 gmmu_pte_kind_zf32_1z_v(void) | 779 | static inline u32 gmmu_pte_kind_zf32_1z_v(void) |
780 | { | 780 | { |
781 | return 0x0000007c; | 781 | return 0x0000007cU; |
782 | } | 782 | } |
783 | static inline u32 gmmu_pte_kind_zf32_ms2_1z_v(void) | 783 | static inline u32 gmmu_pte_kind_zf32_ms2_1z_v(void) |
784 | { | 784 | { |
785 | return 0x0000007d; | 785 | return 0x0000007dU; |
786 | } | 786 | } |
787 | static inline u32 gmmu_pte_kind_zf32_ms4_1z_v(void) | 787 | static inline u32 gmmu_pte_kind_zf32_ms4_1z_v(void) |
788 | { | 788 | { |
789 | return 0x0000007e; | 789 | return 0x0000007eU; |
790 | } | 790 | } |
791 | static inline u32 gmmu_pte_kind_zf32_ms8_1z_v(void) | 791 | static inline u32 gmmu_pte_kind_zf32_ms8_1z_v(void) |
792 | { | 792 | { |
793 | return 0x0000007f; | 793 | return 0x0000007fU; |
794 | } | 794 | } |
795 | static inline u32 gmmu_pte_kind_zf32_ms16_1z_v(void) | 795 | static inline u32 gmmu_pte_kind_zf32_ms16_1z_v(void) |
796 | { | 796 | { |
797 | return 0x00000080; | 797 | return 0x00000080U; |
798 | } | 798 | } |
799 | static inline u32 gmmu_pte_kind_zf32_2cs_v(void) | 799 | static inline u32 gmmu_pte_kind_zf32_2cs_v(void) |
800 | { | 800 | { |
801 | return 0x00000081; | 801 | return 0x00000081U; |
802 | } | 802 | } |
803 | static inline u32 gmmu_pte_kind_zf32_ms2_2cs_v(void) | 803 | static inline u32 gmmu_pte_kind_zf32_ms2_2cs_v(void) |
804 | { | 804 | { |
805 | return 0x00000082; | 805 | return 0x00000082U; |
806 | } | 806 | } |
807 | static inline u32 gmmu_pte_kind_zf32_ms4_2cs_v(void) | 807 | static inline u32 gmmu_pte_kind_zf32_ms4_2cs_v(void) |
808 | { | 808 | { |
809 | return 0x00000083; | 809 | return 0x00000083U; |
810 | } | 810 | } |
811 | static inline u32 gmmu_pte_kind_zf32_ms8_2cs_v(void) | 811 | static inline u32 gmmu_pte_kind_zf32_ms8_2cs_v(void) |
812 | { | 812 | { |
813 | return 0x00000084; | 813 | return 0x00000084U; |
814 | } | 814 | } |
815 | static inline u32 gmmu_pte_kind_zf32_ms16_2cs_v(void) | 815 | static inline u32 gmmu_pte_kind_zf32_ms16_2cs_v(void) |
816 | { | 816 | { |
817 | return 0x00000085; | 817 | return 0x00000085U; |
818 | } | 818 | } |
819 | static inline u32 gmmu_pte_kind_zf32_2cz_v(void) | 819 | static inline u32 gmmu_pte_kind_zf32_2cz_v(void) |
820 | { | 820 | { |
821 | return 0x00000086; | 821 | return 0x00000086U; |
822 | } | 822 | } |
823 | static inline u32 gmmu_pte_kind_zf32_ms2_2cz_v(void) | 823 | static inline u32 gmmu_pte_kind_zf32_ms2_2cz_v(void) |
824 | { | 824 | { |
825 | return 0x00000087; | 825 | return 0x00000087U; |
826 | } | 826 | } |
827 | static inline u32 gmmu_pte_kind_zf32_ms4_2cz_v(void) | 827 | static inline u32 gmmu_pte_kind_zf32_ms4_2cz_v(void) |
828 | { | 828 | { |
829 | return 0x00000088; | 829 | return 0x00000088U; |
830 | } | 830 | } |
831 | static inline u32 gmmu_pte_kind_zf32_ms8_2cz_v(void) | 831 | static inline u32 gmmu_pte_kind_zf32_ms8_2cz_v(void) |
832 | { | 832 | { |
833 | return 0x00000089; | 833 | return 0x00000089U; |
834 | } | 834 | } |
835 | static inline u32 gmmu_pte_kind_zf32_ms16_2cz_v(void) | 835 | static inline u32 gmmu_pte_kind_zf32_ms16_2cz_v(void) |
836 | { | 836 | { |
837 | return 0x0000008a; | 837 | return 0x0000008aU; |
838 | } | 838 | } |
839 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_v(void) | 839 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_v(void) |
840 | { | 840 | { |
841 | return 0x0000008b; | 841 | return 0x0000008bU; |
842 | } | 842 | } |
843 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_v(void) | 843 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_v(void) |
844 | { | 844 | { |
845 | return 0x0000008c; | 845 | return 0x0000008cU; |
846 | } | 846 | } |
847 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_v(void) | 847 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_v(void) |
848 | { | 848 | { |
849 | return 0x0000008d; | 849 | return 0x0000008dU; |
850 | } | 850 | } |
851 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_v(void) | 851 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_v(void) |
852 | { | 852 | { |
853 | return 0x0000008e; | 853 | return 0x0000008eU; |
854 | } | 854 | } |
855 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_1cs_v(void) | 855 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_1cs_v(void) |
856 | { | 856 | { |
857 | return 0x0000008f; | 857 | return 0x0000008fU; |
858 | } | 858 | } |
859 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_1cs_v(void) | 859 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_1cs_v(void) |
860 | { | 860 | { |
861 | return 0x00000090; | 861 | return 0x00000090U; |
862 | } | 862 | } |
863 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_1cs_v(void) | 863 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_1cs_v(void) |
864 | { | 864 | { |
865 | return 0x00000091; | 865 | return 0x00000091U; |
866 | } | 866 | } |
867 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_1cs_v(void) | 867 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_1cs_v(void) |
868 | { | 868 | { |
869 | return 0x00000092; | 869 | return 0x00000092U; |
870 | } | 870 | } |
871 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_1zv_v(void) | 871 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_1zv_v(void) |
872 | { | 872 | { |
873 | return 0x00000097; | 873 | return 0x00000097U; |
874 | } | 874 | } |
875 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_1zv_v(void) | 875 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_1zv_v(void) |
876 | { | 876 | { |
877 | return 0x00000098; | 877 | return 0x00000098U; |
878 | } | 878 | } |
879 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_1zv_v(void) | 879 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_1zv_v(void) |
880 | { | 880 | { |
881 | return 0x00000099; | 881 | return 0x00000099U; |
882 | } | 882 | } |
883 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_1zv_v(void) | 883 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_1zv_v(void) |
884 | { | 884 | { |
885 | return 0x0000009a; | 885 | return 0x0000009aU; |
886 | } | 886 | } |
887 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_1czv_v(void) | 887 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_1czv_v(void) |
888 | { | 888 | { |
889 | return 0x0000009b; | 889 | return 0x0000009bU; |
890 | } | 890 | } |
891 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_1czv_v(void) | 891 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_1czv_v(void) |
892 | { | 892 | { |
893 | return 0x0000009c; | 893 | return 0x0000009cU; |
894 | } | 894 | } |
895 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_1czv_v(void) | 895 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_1czv_v(void) |
896 | { | 896 | { |
897 | return 0x0000009d; | 897 | return 0x0000009dU; |
898 | } | 898 | } |
899 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_1czv_v(void) | 899 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_1czv_v(void) |
900 | { | 900 | { |
901 | return 0x0000009e; | 901 | return 0x0000009eU; |
902 | } | 902 | } |
903 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_2cs_v(void) | 903 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_2cs_v(void) |
904 | { | 904 | { |
905 | return 0x0000009f; | 905 | return 0x0000009fU; |
906 | } | 906 | } |
907 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_2cs_v(void) | 907 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_2cs_v(void) |
908 | { | 908 | { |
909 | return 0x000000a0; | 909 | return 0x000000a0U; |
910 | } | 910 | } |
911 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_2cs_v(void) | 911 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_2cs_v(void) |
912 | { | 912 | { |
913 | return 0x000000a1; | 913 | return 0x000000a1U; |
914 | } | 914 | } |
915 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_2cs_v(void) | 915 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_2cs_v(void) |
916 | { | 916 | { |
917 | return 0x000000a2; | 917 | return 0x000000a2U; |
918 | } | 918 | } |
919 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_2cszv_v(void) | 919 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc12_2cszv_v(void) |
920 | { | 920 | { |
921 | return 0x000000a3; | 921 | return 0x000000a3U; |
922 | } | 922 | } |
923 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_2cszv_v(void) | 923 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms4_vc4_2cszv_v(void) |
924 | { | 924 | { |
925 | return 0x000000a4; | 925 | return 0x000000a4U; |
926 | } | 926 | } |
927 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_2cszv_v(void) | 927 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc8_2cszv_v(void) |
928 | { | 928 | { |
929 | return 0x000000a5; | 929 | return 0x000000a5U; |
930 | } | 930 | } |
931 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_2cszv_v(void) | 931 | static inline u32 gmmu_pte_kind_x8z24_x16v8s8_ms8_vc24_2cszv_v(void) |
932 | { | 932 | { |
933 | return 0x000000a6; | 933 | return 0x000000a6U; |
934 | } | 934 | } |
935 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_v(void) | 935 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_v(void) |
936 | { | 936 | { |
937 | return 0x000000a7; | 937 | return 0x000000a7U; |
938 | } | 938 | } |
939 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_v(void) | 939 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_v(void) |
940 | { | 940 | { |
941 | return 0x000000a8; | 941 | return 0x000000a8U; |
942 | } | 942 | } |
943 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_v(void) | 943 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_v(void) |
944 | { | 944 | { |
945 | return 0x000000a9; | 945 | return 0x000000a9U; |
946 | } | 946 | } |
947 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_v(void) | 947 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_v(void) |
948 | { | 948 | { |
949 | return 0x000000aa; | 949 | return 0x000000aaU; |
950 | } | 950 | } |
951 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_1cs_v(void) | 951 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_1cs_v(void) |
952 | { | 952 | { |
953 | return 0x000000ab; | 953 | return 0x000000abU; |
954 | } | 954 | } |
955 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_1cs_v(void) | 955 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_1cs_v(void) |
956 | { | 956 | { |
957 | return 0x000000ac; | 957 | return 0x000000acU; |
958 | } | 958 | } |
959 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_1cs_v(void) | 959 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_1cs_v(void) |
960 | { | 960 | { |
961 | return 0x000000ad; | 961 | return 0x000000adU; |
962 | } | 962 | } |
963 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_1cs_v(void) | 963 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_1cs_v(void) |
964 | { | 964 | { |
965 | return 0x000000ae; | 965 | return 0x000000aeU; |
966 | } | 966 | } |
967 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_1zv_v(void) | 967 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_1zv_v(void) |
968 | { | 968 | { |
969 | return 0x000000b3; | 969 | return 0x000000b3U; |
970 | } | 970 | } |
971 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_1zv_v(void) | 971 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_1zv_v(void) |
972 | { | 972 | { |
973 | return 0x000000b4; | 973 | return 0x000000b4U; |
974 | } | 974 | } |
975 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_1zv_v(void) | 975 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_1zv_v(void) |
976 | { | 976 | { |
977 | return 0x000000b5; | 977 | return 0x000000b5U; |
978 | } | 978 | } |
979 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_1zv_v(void) | 979 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_1zv_v(void) |
980 | { | 980 | { |
981 | return 0x000000b6; | 981 | return 0x000000b6U; |
982 | } | 982 | } |
983 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_1czv_v(void) | 983 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_1czv_v(void) |
984 | { | 984 | { |
985 | return 0x000000b7; | 985 | return 0x000000b7U; |
986 | } | 986 | } |
987 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_1czv_v(void) | 987 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_1czv_v(void) |
988 | { | 988 | { |
989 | return 0x000000b8; | 989 | return 0x000000b8U; |
990 | } | 990 | } |
991 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_1czv_v(void) | 991 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_1czv_v(void) |
992 | { | 992 | { |
993 | return 0x000000b9; | 993 | return 0x000000b9U; |
994 | } | 994 | } |
995 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_1czv_v(void) | 995 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_1czv_v(void) |
996 | { | 996 | { |
997 | return 0x000000ba; | 997 | return 0x000000baU; |
998 | } | 998 | } |
999 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_2cs_v(void) | 999 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_2cs_v(void) |
1000 | { | 1000 | { |
1001 | return 0x000000bb; | 1001 | return 0x000000bbU; |
1002 | } | 1002 | } |
1003 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_2cs_v(void) | 1003 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_2cs_v(void) |
1004 | { | 1004 | { |
1005 | return 0x000000bc; | 1005 | return 0x000000bcU; |
1006 | } | 1006 | } |
1007 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_2cs_v(void) | 1007 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_2cs_v(void) |
1008 | { | 1008 | { |
1009 | return 0x000000bd; | 1009 | return 0x000000bdU; |
1010 | } | 1010 | } |
1011 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_2cs_v(void) | 1011 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_2cs_v(void) |
1012 | { | 1012 | { |
1013 | return 0x000000be; | 1013 | return 0x000000beU; |
1014 | } | 1014 | } |
1015 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_2cszv_v(void) | 1015 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc12_2cszv_v(void) |
1016 | { | 1016 | { |
1017 | return 0x000000bf; | 1017 | return 0x000000bfU; |
1018 | } | 1018 | } |
1019 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_2cszv_v(void) | 1019 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms4_vc4_2cszv_v(void) |
1020 | { | 1020 | { |
1021 | return 0x000000c0; | 1021 | return 0x000000c0U; |
1022 | } | 1022 | } |
1023 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_2cszv_v(void) | 1023 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc8_2cszv_v(void) |
1024 | { | 1024 | { |
1025 | return 0x000000c1; | 1025 | return 0x000000c1U; |
1026 | } | 1026 | } |
1027 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_2cszv_v(void) | 1027 | static inline u32 gmmu_pte_kind_zf32_x16v8s8_ms8_vc24_2cszv_v(void) |
1028 | { | 1028 | { |
1029 | return 0x000000c2; | 1029 | return 0x000000c2U; |
1030 | } | 1030 | } |
1031 | static inline u32 gmmu_pte_kind_zf32_x24s8_v(void) | 1031 | static inline u32 gmmu_pte_kind_zf32_x24s8_v(void) |
1032 | { | 1032 | { |
1033 | return 0x000000c3; | 1033 | return 0x000000c3U; |
1034 | } | 1034 | } |
1035 | static inline u32 gmmu_pte_kind_zf32_x24s8_1cs_v(void) | 1035 | static inline u32 gmmu_pte_kind_zf32_x24s8_1cs_v(void) |
1036 | { | 1036 | { |
1037 | return 0x000000c4; | 1037 | return 0x000000c4U; |
1038 | } | 1038 | } |
1039 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms2_1cs_v(void) | 1039 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms2_1cs_v(void) |
1040 | { | 1040 | { |
1041 | return 0x000000c5; | 1041 | return 0x000000c5U; |
1042 | } | 1042 | } |
1043 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms4_1cs_v(void) | 1043 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms4_1cs_v(void) |
1044 | { | 1044 | { |
1045 | return 0x000000c6; | 1045 | return 0x000000c6U; |
1046 | } | 1046 | } |
1047 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms8_1cs_v(void) | 1047 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms8_1cs_v(void) |
1048 | { | 1048 | { |
1049 | return 0x000000c7; | 1049 | return 0x000000c7U; |
1050 | } | 1050 | } |
1051 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms16_1cs_v(void) | 1051 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms16_1cs_v(void) |
1052 | { | 1052 | { |
1053 | return 0x000000c8; | 1053 | return 0x000000c8U; |
1054 | } | 1054 | } |
1055 | static inline u32 gmmu_pte_kind_zf32_x24s8_2cszv_v(void) | 1055 | static inline u32 gmmu_pte_kind_zf32_x24s8_2cszv_v(void) |
1056 | { | 1056 | { |
1057 | return 0x000000ce; | 1057 | return 0x000000ceU; |
1058 | } | 1058 | } |
1059 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms2_2cszv_v(void) | 1059 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms2_2cszv_v(void) |
1060 | { | 1060 | { |
1061 | return 0x000000cf; | 1061 | return 0x000000cfU; |
1062 | } | 1062 | } |
1063 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms4_2cszv_v(void) | 1063 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms4_2cszv_v(void) |
1064 | { | 1064 | { |
1065 | return 0x000000d0; | 1065 | return 0x000000d0U; |
1066 | } | 1066 | } |
1067 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms8_2cszv_v(void) | 1067 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms8_2cszv_v(void) |
1068 | { | 1068 | { |
1069 | return 0x000000d1; | 1069 | return 0x000000d1U; |
1070 | } | 1070 | } |
1071 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms16_2cszv_v(void) | 1071 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms16_2cszv_v(void) |
1072 | { | 1072 | { |
1073 | return 0x000000d2; | 1073 | return 0x000000d2U; |
1074 | } | 1074 | } |
1075 | static inline u32 gmmu_pte_kind_zf32_x24s8_2cs_v(void) | 1075 | static inline u32 gmmu_pte_kind_zf32_x24s8_2cs_v(void) |
1076 | { | 1076 | { |
1077 | return 0x000000d3; | 1077 | return 0x000000d3U; |
1078 | } | 1078 | } |
1079 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms2_2cs_v(void) | 1079 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms2_2cs_v(void) |
1080 | { | 1080 | { |
1081 | return 0x000000d4; | 1081 | return 0x000000d4U; |
1082 | } | 1082 | } |
1083 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms4_2cs_v(void) | 1083 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms4_2cs_v(void) |
1084 | { | 1084 | { |
1085 | return 0x000000d5; | 1085 | return 0x000000d5U; |
1086 | } | 1086 | } |
1087 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms8_2cs_v(void) | 1087 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms8_2cs_v(void) |
1088 | { | 1088 | { |
1089 | return 0x000000d6; | 1089 | return 0x000000d6U; |
1090 | } | 1090 | } |
1091 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms16_2cs_v(void) | 1091 | static inline u32 gmmu_pte_kind_zf32_x24s8_ms16_2cs_v(void) |
1092 | { | 1092 | { |
1093 | return 0x000000d7; | 1093 | return 0x000000d7U; |
1094 | } | 1094 | } |
1095 | static inline u32 gmmu_pte_kind_generic_16bx2_v(void) | 1095 | static inline u32 gmmu_pte_kind_generic_16bx2_v(void) |
1096 | { | 1096 | { |
1097 | return 0x000000fe; | 1097 | return 0x000000feU; |
1098 | } | 1098 | } |
1099 | static inline u32 gmmu_pte_kind_c32_2c_v(void) | 1099 | static inline u32 gmmu_pte_kind_c32_2c_v(void) |
1100 | { | 1100 | { |
1101 | return 0x000000d8; | 1101 | return 0x000000d8U; |
1102 | } | 1102 | } |
1103 | static inline u32 gmmu_pte_kind_c32_2cbr_v(void) | 1103 | static inline u32 gmmu_pte_kind_c32_2cbr_v(void) |
1104 | { | 1104 | { |
1105 | return 0x000000d9; | 1105 | return 0x000000d9U; |
1106 | } | 1106 | } |
1107 | static inline u32 gmmu_pte_kind_c32_2cba_v(void) | 1107 | static inline u32 gmmu_pte_kind_c32_2cba_v(void) |
1108 | { | 1108 | { |
1109 | return 0x000000da; | 1109 | return 0x000000daU; |
1110 | } | 1110 | } |
1111 | static inline u32 gmmu_pte_kind_c32_2cra_v(void) | 1111 | static inline u32 gmmu_pte_kind_c32_2cra_v(void) |
1112 | { | 1112 | { |
1113 | return 0x000000db; | 1113 | return 0x000000dbU; |
1114 | } | 1114 | } |
1115 | static inline u32 gmmu_pte_kind_c32_2bra_v(void) | 1115 | static inline u32 gmmu_pte_kind_c32_2bra_v(void) |
1116 | { | 1116 | { |
1117 | return 0x000000dc; | 1117 | return 0x000000dcU; |
1118 | } | 1118 | } |
1119 | static inline u32 gmmu_pte_kind_c32_ms2_2c_v(void) | 1119 | static inline u32 gmmu_pte_kind_c32_ms2_2c_v(void) |
1120 | { | 1120 | { |
1121 | return 0x000000dd; | 1121 | return 0x000000ddU; |
1122 | } | 1122 | } |
1123 | static inline u32 gmmu_pte_kind_c32_ms2_2cbr_v(void) | 1123 | static inline u32 gmmu_pte_kind_c32_ms2_2cbr_v(void) |
1124 | { | 1124 | { |
1125 | return 0x000000de; | 1125 | return 0x000000deU; |
1126 | } | 1126 | } |
1127 | static inline u32 gmmu_pte_kind_c32_ms2_2cra_v(void) | 1127 | static inline u32 gmmu_pte_kind_c32_ms2_2cra_v(void) |
1128 | { | 1128 | { |
1129 | return 0x000000cc; | 1129 | return 0x000000ccU; |
1130 | } | 1130 | } |
1131 | static inline u32 gmmu_pte_kind_c32_ms4_2c_v(void) | 1131 | static inline u32 gmmu_pte_kind_c32_ms4_2c_v(void) |
1132 | { | 1132 | { |
1133 | return 0x000000df; | 1133 | return 0x000000dfU; |
1134 | } | 1134 | } |
1135 | static inline u32 gmmu_pte_kind_c32_ms4_2cbr_v(void) | 1135 | static inline u32 gmmu_pte_kind_c32_ms4_2cbr_v(void) |
1136 | { | 1136 | { |
1137 | return 0x000000e0; | 1137 | return 0x000000e0U; |
1138 | } | 1138 | } |
1139 | static inline u32 gmmu_pte_kind_c32_ms4_2cba_v(void) | 1139 | static inline u32 gmmu_pte_kind_c32_ms4_2cba_v(void) |
1140 | { | 1140 | { |
1141 | return 0x000000e1; | 1141 | return 0x000000e1U; |
1142 | } | 1142 | } |
1143 | static inline u32 gmmu_pte_kind_c32_ms4_2cra_v(void) | 1143 | static inline u32 gmmu_pte_kind_c32_ms4_2cra_v(void) |
1144 | { | 1144 | { |
1145 | return 0x000000e2; | 1145 | return 0x000000e2U; |
1146 | } | 1146 | } |
1147 | static inline u32 gmmu_pte_kind_c32_ms4_2bra_v(void) | 1147 | static inline u32 gmmu_pte_kind_c32_ms4_2bra_v(void) |
1148 | { | 1148 | { |
1149 | return 0x000000e3; | 1149 | return 0x000000e3U; |
1150 | } | 1150 | } |
1151 | static inline u32 gmmu_pte_kind_c32_ms4_4cbra_v(void) | 1151 | static inline u32 gmmu_pte_kind_c32_ms4_4cbra_v(void) |
1152 | { | 1152 | { |
1153 | return 0x0000002c; | 1153 | return 0x0000002cU; |
1154 | } | 1154 | } |
1155 | static inline u32 gmmu_pte_kind_c32_ms8_ms16_2c_v(void) | 1155 | static inline u32 gmmu_pte_kind_c32_ms8_ms16_2c_v(void) |
1156 | { | 1156 | { |
1157 | return 0x000000e4; | 1157 | return 0x000000e4U; |
1158 | } | 1158 | } |
1159 | static inline u32 gmmu_pte_kind_c32_ms8_ms16_2cra_v(void) | 1159 | static inline u32 gmmu_pte_kind_c32_ms8_ms16_2cra_v(void) |
1160 | { | 1160 | { |
1161 | return 0x000000e5; | 1161 | return 0x000000e5U; |
1162 | } | 1162 | } |
1163 | static inline u32 gmmu_pte_kind_c64_2c_v(void) | 1163 | static inline u32 gmmu_pte_kind_c64_2c_v(void) |
1164 | { | 1164 | { |
1165 | return 0x000000e6; | 1165 | return 0x000000e6U; |
1166 | } | 1166 | } |
1167 | static inline u32 gmmu_pte_kind_c64_2cbr_v(void) | 1167 | static inline u32 gmmu_pte_kind_c64_2cbr_v(void) |
1168 | { | 1168 | { |
1169 | return 0x000000e7; | 1169 | return 0x000000e7U; |
1170 | } | 1170 | } |
1171 | static inline u32 gmmu_pte_kind_c64_2cba_v(void) | 1171 | static inline u32 gmmu_pte_kind_c64_2cba_v(void) |
1172 | { | 1172 | { |
1173 | return 0x000000e8; | 1173 | return 0x000000e8U; |
1174 | } | 1174 | } |
1175 | static inline u32 gmmu_pte_kind_c64_2cra_v(void) | 1175 | static inline u32 gmmu_pte_kind_c64_2cra_v(void) |
1176 | { | 1176 | { |
1177 | return 0x000000e9; | 1177 | return 0x000000e9U; |
1178 | } | 1178 | } |
1179 | static inline u32 gmmu_pte_kind_c64_2bra_v(void) | 1179 | static inline u32 gmmu_pte_kind_c64_2bra_v(void) |
1180 | { | 1180 | { |
1181 | return 0x000000ea; | 1181 | return 0x000000eaU; |
1182 | } | 1182 | } |
1183 | static inline u32 gmmu_pte_kind_c64_ms2_2c_v(void) | 1183 | static inline u32 gmmu_pte_kind_c64_ms2_2c_v(void) |
1184 | { | 1184 | { |
1185 | return 0x000000eb; | 1185 | return 0x000000ebU; |
1186 | } | 1186 | } |
1187 | static inline u32 gmmu_pte_kind_c64_ms2_2cbr_v(void) | 1187 | static inline u32 gmmu_pte_kind_c64_ms2_2cbr_v(void) |
1188 | { | 1188 | { |
1189 | return 0x000000ec; | 1189 | return 0x000000ecU; |
1190 | } | 1190 | } |
1191 | static inline u32 gmmu_pte_kind_c64_ms2_2cra_v(void) | 1191 | static inline u32 gmmu_pte_kind_c64_ms2_2cra_v(void) |
1192 | { | 1192 | { |
1193 | return 0x000000cd; | 1193 | return 0x000000cdU; |
1194 | } | 1194 | } |
1195 | static inline u32 gmmu_pte_kind_c64_ms4_2c_v(void) | 1195 | static inline u32 gmmu_pte_kind_c64_ms4_2c_v(void) |
1196 | { | 1196 | { |
1197 | return 0x000000ed; | 1197 | return 0x000000edU; |
1198 | } | 1198 | } |
1199 | static inline u32 gmmu_pte_kind_c64_ms4_2cbr_v(void) | 1199 | static inline u32 gmmu_pte_kind_c64_ms4_2cbr_v(void) |
1200 | { | 1200 | { |
1201 | return 0x000000ee; | 1201 | return 0x000000eeU; |
1202 | } | 1202 | } |
1203 | static inline u32 gmmu_pte_kind_c64_ms4_2cba_v(void) | 1203 | static inline u32 gmmu_pte_kind_c64_ms4_2cba_v(void) |
1204 | { | 1204 | { |
1205 | return 0x000000ef; | 1205 | return 0x000000efU; |
1206 | } | 1206 | } |
1207 | static inline u32 gmmu_pte_kind_c64_ms4_2cra_v(void) | 1207 | static inline u32 gmmu_pte_kind_c64_ms4_2cra_v(void) |
1208 | { | 1208 | { |
1209 | return 0x000000f0; | 1209 | return 0x000000f0U; |
1210 | } | 1210 | } |
1211 | static inline u32 gmmu_pte_kind_c64_ms4_2bra_v(void) | 1211 | static inline u32 gmmu_pte_kind_c64_ms4_2bra_v(void) |
1212 | { | 1212 | { |
1213 | return 0x000000f1; | 1213 | return 0x000000f1U; |
1214 | } | 1214 | } |
1215 | static inline u32 gmmu_pte_kind_c64_ms4_4cbra_v(void) | 1215 | static inline u32 gmmu_pte_kind_c64_ms4_4cbra_v(void) |
1216 | { | 1216 | { |
1217 | return 0x0000002d; | 1217 | return 0x0000002dU; |
1218 | } | 1218 | } |
1219 | static inline u32 gmmu_pte_kind_c64_ms8_ms16_2c_v(void) | 1219 | static inline u32 gmmu_pte_kind_c64_ms8_ms16_2c_v(void) |
1220 | { | 1220 | { |
1221 | return 0x000000f2; | 1221 | return 0x000000f2U; |
1222 | } | 1222 | } |
1223 | static inline u32 gmmu_pte_kind_c64_ms8_ms16_2cra_v(void) | 1223 | static inline u32 gmmu_pte_kind_c64_ms8_ms16_2cra_v(void) |
1224 | { | 1224 | { |
1225 | return 0x000000f3; | 1225 | return 0x000000f3U; |
1226 | } | 1226 | } |
1227 | static inline u32 gmmu_pte_kind_c128_2c_v(void) | 1227 | static inline u32 gmmu_pte_kind_c128_2c_v(void) |
1228 | { | 1228 | { |
1229 | return 0x000000f4; | 1229 | return 0x000000f4U; |
1230 | } | 1230 | } |
1231 | static inline u32 gmmu_pte_kind_c128_2cr_v(void) | 1231 | static inline u32 gmmu_pte_kind_c128_2cr_v(void) |
1232 | { | 1232 | { |
1233 | return 0x000000f5; | 1233 | return 0x000000f5U; |
1234 | } | 1234 | } |
1235 | static inline u32 gmmu_pte_kind_c128_ms2_2c_v(void) | 1235 | static inline u32 gmmu_pte_kind_c128_ms2_2c_v(void) |
1236 | { | 1236 | { |
1237 | return 0x000000f6; | 1237 | return 0x000000f6U; |
1238 | } | 1238 | } |
1239 | static inline u32 gmmu_pte_kind_c128_ms2_2cr_v(void) | 1239 | static inline u32 gmmu_pte_kind_c128_ms2_2cr_v(void) |
1240 | { | 1240 | { |
1241 | return 0x000000f7; | 1241 | return 0x000000f7U; |
1242 | } | 1242 | } |
1243 | static inline u32 gmmu_pte_kind_c128_ms4_2c_v(void) | 1243 | static inline u32 gmmu_pte_kind_c128_ms4_2c_v(void) |
1244 | { | 1244 | { |
1245 | return 0x000000f8; | 1245 | return 0x000000f8U; |
1246 | } | 1246 | } |
1247 | static inline u32 gmmu_pte_kind_c128_ms4_2cr_v(void) | 1247 | static inline u32 gmmu_pte_kind_c128_ms4_2cr_v(void) |
1248 | { | 1248 | { |
1249 | return 0x000000f9; | 1249 | return 0x000000f9U; |
1250 | } | 1250 | } |
1251 | static inline u32 gmmu_pte_kind_c128_ms8_ms16_2c_v(void) | 1251 | static inline u32 gmmu_pte_kind_c128_ms8_ms16_2c_v(void) |
1252 | { | 1252 | { |
1253 | return 0x000000fa; | 1253 | return 0x000000faU; |
1254 | } | 1254 | } |
1255 | static inline u32 gmmu_pte_kind_c128_ms8_ms16_2cr_v(void) | 1255 | static inline u32 gmmu_pte_kind_c128_ms8_ms16_2cr_v(void) |
1256 | { | 1256 | { |
1257 | return 0x000000fb; | 1257 | return 0x000000fbU; |
1258 | } | 1258 | } |
1259 | static inline u32 gmmu_pte_kind_x8c24_v(void) | 1259 | static inline u32 gmmu_pte_kind_x8c24_v(void) |
1260 | { | 1260 | { |
1261 | return 0x000000fc; | 1261 | return 0x000000fcU; |
1262 | } | 1262 | } |
1263 | static inline u32 gmmu_pte_kind_pitch_no_swizzle_v(void) | 1263 | static inline u32 gmmu_pte_kind_pitch_no_swizzle_v(void) |
1264 | { | 1264 | { |
1265 | return 0x000000fd; | 1265 | return 0x000000fdU; |
1266 | } | 1266 | } |
1267 | static inline u32 gmmu_pte_kind_smsked_message_v(void) | 1267 | static inline u32 gmmu_pte_kind_smsked_message_v(void) |
1268 | { | 1268 | { |
1269 | return 0x000000ca; | 1269 | return 0x000000caU; |
1270 | } | 1270 | } |
1271 | static inline u32 gmmu_pte_kind_smhost_message_v(void) | 1271 | static inline u32 gmmu_pte_kind_smhost_message_v(void) |
1272 | { | 1272 | { |
1273 | return 0x000000cb; | 1273 | return 0x000000cbU; |
1274 | } | 1274 | } |
1275 | static inline u32 gmmu_pte_kind_s8_v(void) | 1275 | static inline u32 gmmu_pte_kind_s8_v(void) |
1276 | { | 1276 | { |
1277 | return 0x0000002a; | 1277 | return 0x0000002aU; |
1278 | } | 1278 | } |
1279 | static inline u32 gmmu_pte_kind_s8_2s_v(void) | 1279 | static inline u32 gmmu_pte_kind_s8_2s_v(void) |
1280 | { | 1280 | { |
1281 | return 0x0000002b; | 1281 | return 0x0000002bU; |
1282 | } | 1282 | } |
1283 | #endif | 1283 | #endif |