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authorTerje Bergstrom <tbergstrom@nvidia.com>2017-09-25 16:24:24 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-09-27 17:17:50 -0400
commit32ed45a4635ddff52bf77e9218f3d401f7f41cee (patch)
treebb5f44c68209ad15531c3b4e9c35b1b979b5a56c /drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_ram_gk20a.h
parent7755605dafcb438e23bdec7713500d6d4938c777 (diff)
gpu: nvgpu: gk20a: Qualify unsigned HW constants
Re-generate hardware headers so that all unsigned constants are qualified with postfix U. This removes the need for compiler to do implicit signed->unsigned conversions. Change-Id: I6f23cb6be4000300388bf17a04103d01571fc250 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1567983 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_ram_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_ram_gk20a.h192
1 files changed, 96 insertions, 96 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_ram_gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_ram_gk20a.h
index d40df281..ed385d9e 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_ram_gk20a.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_ram_gk20a.h
@@ -58,386 +58,386 @@
58 58
59static inline u32 ram_in_ramfc_s(void) 59static inline u32 ram_in_ramfc_s(void)
60{ 60{
61 return 4096; 61 return 4096U;
62} 62}
63static inline u32 ram_in_ramfc_w(void) 63static inline u32 ram_in_ramfc_w(void)
64{ 64{
65 return 0; 65 return 0U;
66} 66}
67static inline u32 ram_in_page_dir_base_target_f(u32 v) 67static inline u32 ram_in_page_dir_base_target_f(u32 v)
68{ 68{
69 return (v & 0x3) << 0; 69 return (v & 0x3U) << 0U;
70} 70}
71static inline u32 ram_in_page_dir_base_target_w(void) 71static inline u32 ram_in_page_dir_base_target_w(void)
72{ 72{
73 return 128; 73 return 128U;
74} 74}
75static inline u32 ram_in_page_dir_base_target_vid_mem_f(void) 75static inline u32 ram_in_page_dir_base_target_vid_mem_f(void)
76{ 76{
77 return 0x0; 77 return 0x0U;
78} 78}
79static inline u32 ram_in_page_dir_base_target_sys_mem_coh_f(void) 79static inline u32 ram_in_page_dir_base_target_sys_mem_coh_f(void)
80{ 80{
81 return 0x2; 81 return 0x2U;
82} 82}
83static inline u32 ram_in_page_dir_base_target_sys_mem_ncoh_f(void) 83static inline u32 ram_in_page_dir_base_target_sys_mem_ncoh_f(void)
84{ 84{
85 return 0x3; 85 return 0x3U;
86} 86}
87static inline u32 ram_in_page_dir_base_vol_w(void) 87static inline u32 ram_in_page_dir_base_vol_w(void)
88{ 88{
89 return 128; 89 return 128U;
90} 90}
91static inline u32 ram_in_page_dir_base_vol_true_f(void) 91static inline u32 ram_in_page_dir_base_vol_true_f(void)
92{ 92{
93 return 0x4; 93 return 0x4U;
94} 94}
95static inline u32 ram_in_page_dir_base_lo_f(u32 v) 95static inline u32 ram_in_page_dir_base_lo_f(u32 v)
96{ 96{
97 return (v & 0xfffff) << 12; 97 return (v & 0xfffffU) << 12U;
98} 98}
99static inline u32 ram_in_page_dir_base_lo_w(void) 99static inline u32 ram_in_page_dir_base_lo_w(void)
100{ 100{
101 return 128; 101 return 128U;
102} 102}
103static inline u32 ram_in_page_dir_base_hi_f(u32 v) 103static inline u32 ram_in_page_dir_base_hi_f(u32 v)
104{ 104{
105 return (v & 0xff) << 0; 105 return (v & 0xffU) << 0U;
106} 106}
107static inline u32 ram_in_page_dir_base_hi_w(void) 107static inline u32 ram_in_page_dir_base_hi_w(void)
108{ 108{
109 return 129; 109 return 129U;
110} 110}
111static inline u32 ram_in_adr_limit_lo_f(u32 v) 111static inline u32 ram_in_adr_limit_lo_f(u32 v)
112{ 112{
113 return (v & 0xfffff) << 12; 113 return (v & 0xfffffU) << 12U;
114} 114}
115static inline u32 ram_in_adr_limit_lo_w(void) 115static inline u32 ram_in_adr_limit_lo_w(void)
116{ 116{
117 return 130; 117 return 130U;
118} 118}
119static inline u32 ram_in_adr_limit_hi_f(u32 v) 119static inline u32 ram_in_adr_limit_hi_f(u32 v)
120{ 120{
121 return (v & 0xff) << 0; 121 return (v & 0xffU) << 0U;
122} 122}
123static inline u32 ram_in_adr_limit_hi_w(void) 123static inline u32 ram_in_adr_limit_hi_w(void)
124{ 124{
125 return 131; 125 return 131U;
126} 126}
127static inline u32 ram_in_engine_cs_w(void) 127static inline u32 ram_in_engine_cs_w(void)
128{ 128{
129 return 132; 129 return 132U;
130} 130}
131static inline u32 ram_in_engine_cs_wfi_v(void) 131static inline u32 ram_in_engine_cs_wfi_v(void)
132{ 132{
133 return 0x00000000; 133 return 0x00000000U;
134} 134}
135static inline u32 ram_in_engine_cs_wfi_f(void) 135static inline u32 ram_in_engine_cs_wfi_f(void)
136{ 136{
137 return 0x0; 137 return 0x0U;
138} 138}
139static inline u32 ram_in_engine_cs_fg_v(void) 139static inline u32 ram_in_engine_cs_fg_v(void)
140{ 140{
141 return 0x00000001; 141 return 0x00000001U;
142} 142}
143static inline u32 ram_in_engine_cs_fg_f(void) 143static inline u32 ram_in_engine_cs_fg_f(void)
144{ 144{
145 return 0x8; 145 return 0x8U;
146} 146}
147static inline u32 ram_in_gr_cs_w(void) 147static inline u32 ram_in_gr_cs_w(void)
148{ 148{
149 return 132; 149 return 132U;
150} 150}
151static inline u32 ram_in_gr_cs_wfi_f(void) 151static inline u32 ram_in_gr_cs_wfi_f(void)
152{ 152{
153 return 0x0; 153 return 0x0U;
154} 154}
155static inline u32 ram_in_gr_wfi_target_w(void) 155static inline u32 ram_in_gr_wfi_target_w(void)
156{ 156{
157 return 132; 157 return 132U;
158} 158}
159static inline u32 ram_in_gr_wfi_mode_w(void) 159static inline u32 ram_in_gr_wfi_mode_w(void)
160{ 160{
161 return 132; 161 return 132U;
162} 162}
163static inline u32 ram_in_gr_wfi_mode_physical_v(void) 163static inline u32 ram_in_gr_wfi_mode_physical_v(void)
164{ 164{
165 return 0x00000000; 165 return 0x00000000U;
166} 166}
167static inline u32 ram_in_gr_wfi_mode_physical_f(void) 167static inline u32 ram_in_gr_wfi_mode_physical_f(void)
168{ 168{
169 return 0x0; 169 return 0x0U;
170} 170}
171static inline u32 ram_in_gr_wfi_mode_virtual_v(void) 171static inline u32 ram_in_gr_wfi_mode_virtual_v(void)
172{ 172{
173 return 0x00000001; 173 return 0x00000001U;
174} 174}
175static inline u32 ram_in_gr_wfi_mode_virtual_f(void) 175static inline u32 ram_in_gr_wfi_mode_virtual_f(void)
176{ 176{
177 return 0x4; 177 return 0x4U;
178} 178}
179static inline u32 ram_in_gr_wfi_ptr_lo_f(u32 v) 179static inline u32 ram_in_gr_wfi_ptr_lo_f(u32 v)
180{ 180{
181 return (v & 0xfffff) << 12; 181 return (v & 0xfffffU) << 12U;
182} 182}
183static inline u32 ram_in_gr_wfi_ptr_lo_w(void) 183static inline u32 ram_in_gr_wfi_ptr_lo_w(void)
184{ 184{
185 return 132; 185 return 132U;
186} 186}
187static inline u32 ram_in_gr_wfi_ptr_hi_f(u32 v) 187static inline u32 ram_in_gr_wfi_ptr_hi_f(u32 v)
188{ 188{
189 return (v & 0xff) << 0; 189 return (v & 0xffU) << 0U;
190} 190}
191static inline u32 ram_in_gr_wfi_ptr_hi_w(void) 191static inline u32 ram_in_gr_wfi_ptr_hi_w(void)
192{ 192{
193 return 133; 193 return 133U;
194} 194}
195static inline u32 ram_in_base_shift_v(void) 195static inline u32 ram_in_base_shift_v(void)
196{ 196{
197 return 0x0000000c; 197 return 0x0000000cU;
198} 198}
199static inline u32 ram_in_alloc_size_v(void) 199static inline u32 ram_in_alloc_size_v(void)
200{ 200{
201 return 0x00001000; 201 return 0x00001000U;
202} 202}
203static inline u32 ram_fc_size_val_v(void) 203static inline u32 ram_fc_size_val_v(void)
204{ 204{
205 return 0x00000200; 205 return 0x00000200U;
206} 206}
207static inline u32 ram_fc_gp_put_w(void) 207static inline u32 ram_fc_gp_put_w(void)
208{ 208{
209 return 0; 209 return 0U;
210} 210}
211static inline u32 ram_fc_userd_w(void) 211static inline u32 ram_fc_userd_w(void)
212{ 212{
213 return 2; 213 return 2U;
214} 214}
215static inline u32 ram_fc_userd_hi_w(void) 215static inline u32 ram_fc_userd_hi_w(void)
216{ 216{
217 return 3; 217 return 3U;
218} 218}
219static inline u32 ram_fc_signature_w(void) 219static inline u32 ram_fc_signature_w(void)
220{ 220{
221 return 4; 221 return 4U;
222} 222}
223static inline u32 ram_fc_gp_get_w(void) 223static inline u32 ram_fc_gp_get_w(void)
224{ 224{
225 return 5; 225 return 5U;
226} 226}
227static inline u32 ram_fc_pb_get_w(void) 227static inline u32 ram_fc_pb_get_w(void)
228{ 228{
229 return 6; 229 return 6U;
230} 230}
231static inline u32 ram_fc_pb_get_hi_w(void) 231static inline u32 ram_fc_pb_get_hi_w(void)
232{ 232{
233 return 7; 233 return 7U;
234} 234}
235static inline u32 ram_fc_pb_top_level_get_w(void) 235static inline u32 ram_fc_pb_top_level_get_w(void)
236{ 236{
237 return 8; 237 return 8U;
238} 238}
239static inline u32 ram_fc_pb_top_level_get_hi_w(void) 239static inline u32 ram_fc_pb_top_level_get_hi_w(void)
240{ 240{
241 return 9; 241 return 9U;
242} 242}
243static inline u32 ram_fc_acquire_w(void) 243static inline u32 ram_fc_acquire_w(void)
244{ 244{
245 return 12; 245 return 12U;
246} 246}
247static inline u32 ram_fc_semaphorea_w(void) 247static inline u32 ram_fc_semaphorea_w(void)
248{ 248{
249 return 14; 249 return 14U;
250} 250}
251static inline u32 ram_fc_semaphoreb_w(void) 251static inline u32 ram_fc_semaphoreb_w(void)
252{ 252{
253 return 15; 253 return 15U;
254} 254}
255static inline u32 ram_fc_semaphorec_w(void) 255static inline u32 ram_fc_semaphorec_w(void)
256{ 256{
257 return 16; 257 return 16U;
258} 258}
259static inline u32 ram_fc_semaphored_w(void) 259static inline u32 ram_fc_semaphored_w(void)
260{ 260{
261 return 17; 261 return 17U;
262} 262}
263static inline u32 ram_fc_gp_base_w(void) 263static inline u32 ram_fc_gp_base_w(void)
264{ 264{
265 return 18; 265 return 18U;
266} 266}
267static inline u32 ram_fc_gp_base_hi_w(void) 267static inline u32 ram_fc_gp_base_hi_w(void)
268{ 268{
269 return 19; 269 return 19U;
270} 270}
271static inline u32 ram_fc_gp_fetch_w(void) 271static inline u32 ram_fc_gp_fetch_w(void)
272{ 272{
273 return 20; 273 return 20U;
274} 274}
275static inline u32 ram_fc_pb_fetch_w(void) 275static inline u32 ram_fc_pb_fetch_w(void)
276{ 276{
277 return 21; 277 return 21U;
278} 278}
279static inline u32 ram_fc_pb_fetch_hi_w(void) 279static inline u32 ram_fc_pb_fetch_hi_w(void)
280{ 280{
281 return 22; 281 return 22U;
282} 282}
283static inline u32 ram_fc_pb_put_w(void) 283static inline u32 ram_fc_pb_put_w(void)
284{ 284{
285 return 23; 285 return 23U;
286} 286}
287static inline u32 ram_fc_pb_put_hi_w(void) 287static inline u32 ram_fc_pb_put_hi_w(void)
288{ 288{
289 return 24; 289 return 24U;
290} 290}
291static inline u32 ram_fc_pb_header_w(void) 291static inline u32 ram_fc_pb_header_w(void)
292{ 292{
293 return 33; 293 return 33U;
294} 294}
295static inline u32 ram_fc_pb_count_w(void) 295static inline u32 ram_fc_pb_count_w(void)
296{ 296{
297 return 34; 297 return 34U;
298} 298}
299static inline u32 ram_fc_subdevice_w(void) 299static inline u32 ram_fc_subdevice_w(void)
300{ 300{
301 return 37; 301 return 37U;
302} 302}
303static inline u32 ram_fc_formats_w(void) 303static inline u32 ram_fc_formats_w(void)
304{ 304{
305 return 39; 305 return 39U;
306} 306}
307static inline u32 ram_fc_syncpointa_w(void) 307static inline u32 ram_fc_syncpointa_w(void)
308{ 308{
309 return 41; 309 return 41U;
310} 310}
311static inline u32 ram_fc_syncpointb_w(void) 311static inline u32 ram_fc_syncpointb_w(void)
312{ 312{
313 return 42; 313 return 42U;
314} 314}
315static inline u32 ram_fc_target_w(void) 315static inline u32 ram_fc_target_w(void)
316{ 316{
317 return 43; 317 return 43U;
318} 318}
319static inline u32 ram_fc_hce_ctrl_w(void) 319static inline u32 ram_fc_hce_ctrl_w(void)
320{ 320{
321 return 57; 321 return 57U;
322} 322}
323static inline u32 ram_fc_chid_w(void) 323static inline u32 ram_fc_chid_w(void)
324{ 324{
325 return 58; 325 return 58U;
326} 326}
327static inline u32 ram_fc_chid_id_f(u32 v) 327static inline u32 ram_fc_chid_id_f(u32 v)
328{ 328{
329 return (v & 0xfff) << 0; 329 return (v & 0xfffU) << 0U;
330} 330}
331static inline u32 ram_fc_chid_id_w(void) 331static inline u32 ram_fc_chid_id_w(void)
332{ 332{
333 return 0; 333 return 0U;
334} 334}
335static inline u32 ram_fc_runlist_timeslice_w(void) 335static inline u32 ram_fc_runlist_timeslice_w(void)
336{ 336{
337 return 62; 337 return 62U;
338} 338}
339static inline u32 ram_fc_pb_timeslice_w(void) 339static inline u32 ram_fc_pb_timeslice_w(void)
340{ 340{
341 return 63; 341 return 63U;
342} 342}
343static inline u32 ram_userd_base_shift_v(void) 343static inline u32 ram_userd_base_shift_v(void)
344{ 344{
345 return 0x00000009; 345 return 0x00000009U;
346} 346}
347static inline u32 ram_userd_chan_size_v(void) 347static inline u32 ram_userd_chan_size_v(void)
348{ 348{
349 return 0x00000200; 349 return 0x00000200U;
350} 350}
351static inline u32 ram_userd_put_w(void) 351static inline u32 ram_userd_put_w(void)
352{ 352{
353 return 16; 353 return 16U;
354} 354}
355static inline u32 ram_userd_get_w(void) 355static inline u32 ram_userd_get_w(void)
356{ 356{
357 return 17; 357 return 17U;
358} 358}
359static inline u32 ram_userd_ref_w(void) 359static inline u32 ram_userd_ref_w(void)
360{ 360{
361 return 18; 361 return 18U;
362} 362}
363static inline u32 ram_userd_put_hi_w(void) 363static inline u32 ram_userd_put_hi_w(void)
364{ 364{
365 return 19; 365 return 19U;
366} 366}
367static inline u32 ram_userd_ref_threshold_w(void) 367static inline u32 ram_userd_ref_threshold_w(void)
368{ 368{
369 return 20; 369 return 20U;
370} 370}
371static inline u32 ram_userd_top_level_get_w(void) 371static inline u32 ram_userd_top_level_get_w(void)
372{ 372{
373 return 22; 373 return 22U;
374} 374}
375static inline u32 ram_userd_top_level_get_hi_w(void) 375static inline u32 ram_userd_top_level_get_hi_w(void)
376{ 376{
377 return 23; 377 return 23U;
378} 378}
379static inline u32 ram_userd_get_hi_w(void) 379static inline u32 ram_userd_get_hi_w(void)
380{ 380{
381 return 24; 381 return 24U;
382} 382}
383static inline u32 ram_userd_gp_get_w(void) 383static inline u32 ram_userd_gp_get_w(void)
384{ 384{
385 return 34; 385 return 34U;
386} 386}
387static inline u32 ram_userd_gp_put_w(void) 387static inline u32 ram_userd_gp_put_w(void)
388{ 388{
389 return 35; 389 return 35U;
390} 390}
391static inline u32 ram_userd_gp_top_level_get_w(void) 391static inline u32 ram_userd_gp_top_level_get_w(void)
392{ 392{
393 return 22; 393 return 22U;
394} 394}
395static inline u32 ram_userd_gp_top_level_get_hi_w(void) 395static inline u32 ram_userd_gp_top_level_get_hi_w(void)
396{ 396{
397 return 23; 397 return 23U;
398} 398}
399static inline u32 ram_rl_entry_size_v(void) 399static inline u32 ram_rl_entry_size_v(void)
400{ 400{
401 return 0x00000008; 401 return 0x00000008U;
402} 402}
403static inline u32 ram_rl_entry_chid_f(u32 v) 403static inline u32 ram_rl_entry_chid_f(u32 v)
404{ 404{
405 return (v & 0xfff) << 0; 405 return (v & 0xfffU) << 0U;
406} 406}
407static inline u32 ram_rl_entry_id_f(u32 v) 407static inline u32 ram_rl_entry_id_f(u32 v)
408{ 408{
409 return (v & 0xfff) << 0; 409 return (v & 0xfffU) << 0U;
410} 410}
411static inline u32 ram_rl_entry_type_f(u32 v) 411static inline u32 ram_rl_entry_type_f(u32 v)
412{ 412{
413 return (v & 0x1) << 13; 413 return (v & 0x1U) << 13U;
414} 414}
415static inline u32 ram_rl_entry_type_chid_f(void) 415static inline u32 ram_rl_entry_type_chid_f(void)
416{ 416{
417 return 0x0; 417 return 0x0U;
418} 418}
419static inline u32 ram_rl_entry_type_tsg_f(void) 419static inline u32 ram_rl_entry_type_tsg_f(void)
420{ 420{
421 return 0x2000; 421 return 0x2000U;
422} 422}
423static inline u32 ram_rl_entry_timeslice_scale_f(u32 v) 423static inline u32 ram_rl_entry_timeslice_scale_f(u32 v)
424{ 424{
425 return (v & 0xf) << 14; 425 return (v & 0xfU) << 14U;
426} 426}
427static inline u32 ram_rl_entry_timeslice_scale_3_f(void) 427static inline u32 ram_rl_entry_timeslice_scale_3_f(void)
428{ 428{
429 return 0xc000; 429 return 0xc000U;
430} 430}
431static inline u32 ram_rl_entry_timeslice_timeout_f(u32 v) 431static inline u32 ram_rl_entry_timeslice_timeout_f(u32 v)
432{ 432{
433 return (v & 0xff) << 18; 433 return (v & 0xffU) << 18U;
434} 434}
435static inline u32 ram_rl_entry_timeslice_timeout_128_f(void) 435static inline u32 ram_rl_entry_timeslice_timeout_128_f(void)
436{ 436{
437 return 0x2000000; 437 return 0x2000000U;
438} 438}
439static inline u32 ram_rl_entry_tsg_length_f(u32 v) 439static inline u32 ram_rl_entry_tsg_length_f(u32 v)
440{ 440{
441 return (v & 0x3f) << 26; 441 return (v & 0x3fU) << 26U;
442} 442}
443#endif 443#endif