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authorAlex Waterman <alexw@nvidia.com>2017-04-17 19:26:28 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-05-19 18:34:01 -0400
commitd37e8f7dcf190f31f9c0c12583db2bb0c0d313c0 (patch)
tree4807c89bf40954c54804c3a8dd88c16849181f29 /drivers/gpu/nvgpu/include/nvgpu/gmmu.h
parentdcb744acfbbc11e66cac2d0a674a42e62d908b9d (diff)
gpu: nvgpu: Split VM interface out
This patch begins the major rework of the GPU's virtual memory manager (VMM). The VMM is the piece of code that handles the userspace interface to buffers and their mappings into the GMMU. The core data structure is the VM - for now still known as 'struct vm_gk20a'. Each one of these structs represents one addres space to which channels or TSGs may bind themselves to. The VMM splits the interface up into two broad categories. First there's the common, OS independent interfaces; and second there's the OS specific interfaces. OS independent -------------- This is the code that manages the lifetime of VMs, the buffers inside VMs (search, batch mapping) creation, destruction, etc. OS Specific ----------- This handles mapping of buffers represented as they are represented by the OS (dma_buf's for example on Linux). This patch is by no means complete. There's still Linux specific functions scattered in ostensibly OS independent code. This is the first step. A patch that rewrites everything in one go would simply be too big to effectively review. Instead the goal of this change is to simply separate out the basic OS specific and OS agnostic interfaces into their own header files. The next series of patches will start to pull the relevant implementations into OS specific C files and common C files. JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: I242c7206047b6c769296226d855b7e44d5c4bfa8 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1464939 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/include/nvgpu/gmmu.h')
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/gmmu.h35
1 files changed, 34 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gmmu.h b/drivers/gpu/nvgpu/include/nvgpu/gmmu.h
index 7fb0147e..6d8aa025 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gmmu.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gmmu.h
@@ -18,6 +18,9 @@
18#define __NVGPU_GMMU_H__ 18#define __NVGPU_GMMU_H__
19 19
20#include <nvgpu/types.h> 20#include <nvgpu/types.h>
21#include <nvgpu/nvgpu_mem.h>
22
23struct scatterlist;
21 24
22/* 25/*
23 * This is the GMMU API visible to blocks outside of the GMMU. Basically this 26 * This is the GMMU API visible to blocks outside of the GMMU. Basically this
@@ -28,7 +31,37 @@
28struct vm_gk20a; 31struct vm_gk20a;
29struct nvgpu_mem; 32struct nvgpu_mem;
30 33
31enum nvgpu_aperture; 34enum gmmu_pgsz_gk20a {
35 gmmu_page_size_small = 0,
36 gmmu_page_size_big = 1,
37 gmmu_page_size_kernel = 2,
38 gmmu_nr_page_sizes = 3,
39};
40
41struct gk20a_mm_entry {
42 /* backing for */
43 struct nvgpu_mem mem;
44 u32 woffset; /* if >0, mem is a shadow copy, owned by another entry */
45 int pgsz;
46 struct gk20a_mm_entry *entries;
47 int num_entries;
48};
49
50struct gk20a_mmu_level {
51 int hi_bit[2];
52 int lo_bit[2];
53 int (*update_entry)(struct vm_gk20a *vm,
54 struct gk20a_mm_entry *pte,
55 u32 i, u32 gmmu_pgsz_idx,
56 struct scatterlist **sgl,
57 u64 *offset,
58 u64 *iova,
59 u32 kind_v, u64 *ctag,
60 bool cacheable, bool unmapped_pte,
61 int rw_flag, bool sparse, bool priv,
62 enum nvgpu_aperture aperture);
63 size_t entry_size;
64};
32 65
33/** 66/**
34 * nvgpu_gmmu_map - Map memory into the GMMU. 67 * nvgpu_gmmu_map - Map memory into the GMMU.