gpu: nvgpu: move slices_per_ltc & cacheline_size init to floorsweeping

It was initialized at .init_comptags, but we may also need them without
comptags.

Jira NVGPUT-63

Change-Id: Ie818c3ecf890fc84323b9662a32d666a6d2b3936
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1756373
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 6 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c b/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c
index 96844ebd..b64faaa6 100644
--- a/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c
@@ -53,6 +53,7 @@ void gv11b_ltc_set_zbc_stencil_entry(struct gk20a *g,
 
 void gv11b_ltc_init_fs_state(struct gk20a *g)
 {
+        struct gr_gk20a *gr = &g->gr;
         u32 ltc_intr;
         u32 reg;
 
@@ -62,6 +63,11 @@ void gv11b_ltc_init_fs_state(struct gk20a *g)
         g->ltc_count = gk20a_readl(g, pri_ringmaster_enum_ltc_r());
         nvgpu_log_info(g, "%u ltcs out of %u", g->ltc_count, g->max_ltc_count);
 
+        reg = gk20a_readl(g, ltc_ltcs_ltss_cbc_param_r());
+        gr->slices_per_ltc = ltc_ltcs_ltss_cbc_param_slices_per_ltc_v(reg);;
+        gr->cacheline_size =
+                512U << ltc_ltcs_ltss_cbc_param_cache_line_size_v(reg);
+
         /* Disable LTC interrupts */
         reg = gk20a_readl(g, ltc_ltcs_ltss_intr_r());
         reg &= ~ltc_ltcs_ltss_intr_en_evicted_cb_m();