gpu: nvgpu: add NVGPU_IOCTL_CHANNEL_RESCHEDULE_RUNLIST

Add NVGPU_IOCTL_CHANNEL_RESCHEDULE_RUNLIST ioctl to reschedule runlist,
and optionally check host and FECS status to preempt pending load of
context not belonging to the calling channel on GR engine during context
switch.
This should be called immediately after a submit to decrease worst case
submit to start latency for high interleave channel.
There is less than 0.002% chance that the ioctl blocks up to couple
miliseconds due to race condition of FECS status changing while being read.
For GV11B it will always preempt pending load of unwanted context since
there is no chance that ioctl blocks due to race condition.
Also fix bug with host reschedule for multiple runlists which needs to
write both runlist registers.

Bug 1987640
Bug 1924808
Change-Id: I0b7e2f91bd18b0b20928e5a3311b9426b1bf1848
Signed-off-by: David Li <davli@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1549050
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

4 files changed, 10 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
index 30e03092..f00e806f 100644
--- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
@@ -664,6 +664,13 @@ static u32 gv11b_fifo_get_runlists_mask(struct gk20a *g, u32 act_eng_bitmask,
         return runlists_mask;
 }
 
+int gv11b_fifo_reschedule_runlist(struct channel_gk20a *ch, bool preempt_next)
+{
+        /* gv11b allows multiple outstanding preempts,
+           so always preempt next for best reschedule effect */
+        return nvgpu_fifo_reschedule_runlist(ch, true, false);
+}
+
 static void gv11b_fifo_issue_runlist_preempt(struct gk20a *g,
                                          u32 runlists_mask)
 {
@@ -842,7 +849,6 @@ int gv11b_fifo_preempt_tsg(struct gk20a *g, u32 tsgid)
         return ret;
 }
 
-
 static int gv11b_fifo_preempt_runlists(struct gk20a *g, u32 runlists_mask)
 {
         int ret = 0;
diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h
index 3f58f927..1ae3c93e 100644
--- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h
@@ -76,6 +76,7 @@ void gv11b_dump_channel_status_ramfc(struct gk20a *g,
 void gv11b_dump_eng_status(struct gk20a *g,
                                  struct gk20a_debug_output *o);
 u32 gv11b_fifo_intr_0_error_mask(struct gk20a *g);
+int gv11b_fifo_reschedule_runlist(struct channel_gk20a *ch, bool preempt_next);
 int gv11b_fifo_is_preempt_pending(struct gk20a *g, u32 id,
                  unsigned int id_type, unsigned int timeout_rc_type);
 int gv11b_fifo_preempt_channel(struct gk20a *g, u32 chid);
diff --git a/drivers/gpu/nvgpu/gv11b/gv11b.c b/drivers/gpu/nvgpu/gv11b/gv11b.c
index c1ad7944..09fe9a45 100644
--- a/drivers/gpu/nvgpu/gv11b/gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/gv11b.c
@@ -154,6 +154,7 @@ int gv11b_init_gpu_characteristics(struct gk20a *g)
         __nvgpu_set_enabled(g, NVGPU_SUPPORT_TSG_SUBCONTEXTS, true);
         __nvgpu_set_enabled(g, NVGPU_SUPPORT_IO_COHERENCE, true);
         __nvgpu_set_enabled(g, NVGPU_SUPPORT_SCG, true);
+        __nvgpu_set_enabled(g, NVGPU_SUPPORT_RESCHEDULE_RUNLIST, true);
         __nvgpu_set_enabled(g, NVGPU_SUPPORT_SYNCPOINT_ADDRESS, true);
         __nvgpu_set_enabled(g, NVGPU_SUPPORT_USER_SYNCPOINT, true);
 
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
index 290a9452..ff779075 100644
--- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
@@ -503,6 +503,7 @@ static const struct gpu_ops gv11b_ops = {
                 .tsg_verify_channel_status = gk20a_fifo_tsg_unbind_channel_verify_status,
                 .tsg_verify_status_ctx_reload = gm20b_fifo_tsg_verify_status_ctx_reload,
                 .tsg_verify_status_faulted = gv11b_fifo_tsg_verify_status_faulted,
+                .reschedule_runlist = gv11b_fifo_reschedule_runlist,
                 .update_runlist = gk20a_fifo_update_runlist,
                 .trigger_mmu_fault = NULL,
                 .get_mmu_fault_info = NULL,