nvgpu: gv11b: MISRA Rule 21.2 header guard fixes

MISRA rule 21.2 doesn't allow the use of macro names which start with
an underscore. These leading underscores are to be removed from the
macro names. This patch will fix such violations in gv11b by renaming
them to follow the convention, 'NVGPU_PARENT-DIR_HEADER-NAME' when
there is no keyword repetition between file name and directory or
'NVGPU_HEADER-NAME' when there is repetition.

JIRA NVGPU-1028

Change-Id: Ibf6b54b2a0d3f4fbfacb554b78b88911341b960f
Signed-off-by: smadhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1815567
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

9 files changed, 32 insertions, 32 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/acr_gv11b.h b/drivers/gpu/nvgpu/gv11b/acr_gv11b.h
index 004853be..8529e821 100644
--- a/drivers/gpu/nvgpu/gv11b/acr_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/acr_gv11b.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2017-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -20,8 +20,8 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#ifndef __ACR_GV11B_H_
-#define __ACR_GV11B_H_
+#ifndef NVGPU_ACR_GV11B_H
+#define NVGPU_ACR_GV11B_H
 
 
 int gv11b_bootstrap_hs_flcn(struct gk20a *g);
@@ -30,4 +30,4 @@ int gv11b_init_pmu_setup_hw1(struct gk20a *g,
 void gv11b_setup_apertures(struct gk20a *g);
 int gv11b_alloc_blob_space(struct gk20a *g, size_t size,
                                 struct nvgpu_mem *mem);
-#endif /*__PMU_GP106_H_*/
+#endif /* NVGPU_ACR_GV11B_H */
diff --git a/drivers/gpu/nvgpu/gv11b/ce_gv11b.h b/drivers/gpu/nvgpu/gv11b/ce_gv11b.h
index a0c7e0b1..43a891e6 100644
--- a/drivers/gpu/nvgpu/gv11b/ce_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/ce_gv11b.h
@@ -2,7 +2,7 @@
  *
  * Volta GPU series copy engine
  *
- * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -22,8 +22,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef __CE_GV11B_H__
-#define __CE_GV11B_H__
+#ifndef NVGPU_CE_GV11B_H
+#define NVGPU_CE_GV11B_H
 
 struct gk20a;
 
@@ -32,4 +32,4 @@ u32 gv11b_ce_get_num_lce(struct gk20a *g);
 u32 gv11b_ce_get_num_pce(struct gk20a *g);
 void gv11b_ce_isr(struct gk20a *g, u32 inst_id, u32 pri_base);
 
-#endif /*__CE2_GV11B_H__*/
+#endif /* NVGPU_CE_GV11B_H */
diff --git a/drivers/gpu/nvgpu/gv11b/ecc_gv11b.h b/drivers/gpu/nvgpu/gv11b/ecc_gv11b.h
index ce0f12b9..3dcce6cc 100644
--- a/drivers/gpu/nvgpu/gv11b/ecc_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/ecc_gv11b.h
@@ -20,9 +20,9 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#ifndef __ECC_GV11B_H__
-#define __ECC_GV11B_H__
+#ifndef NVGPU_ECC_GV11B_H
+#define NVGPU_ECC_GV11B_H
 
 int gv11b_ecc_init(struct gk20a *g);
 
-#endif
+#endif /* NVGPU_ECC_GV11B_H */
diff --git a/drivers/gpu/nvgpu/gv11b/gr_ctx_gv11b.h b/drivers/gpu/nvgpu/gv11b/gr_ctx_gv11b.h
index 0a95ab11..c43c2869 100644
--- a/drivers/gpu/nvgpu/gv11b/gr_ctx_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/gr_ctx_gv11b.h
@@ -1,7 +1,7 @@
 /*
  * GV11B Graphics Context
  *
- * Copyright (c) 2016 - 2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016 - 2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -21,8 +21,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef __GR_CTX_GV11B_H__
-#define __GR_CTX_GV11B_H__
+#ifndef NVGPU_GR_CTX_GV11B_H
+#define NVGPU_GR_CTX_GV11B_H
 
 #include "gk20a/gr_ctx_gk20a.h"
 
@@ -33,4 +33,4 @@
 int gr_gv11b_get_netlist_name(struct gk20a *g, int index, char *name);
 bool gr_gv11b_is_firmware_defined(void);
 
-#endif /*__GR_CTX_GV11B_H__*/
+#endif /* NVGPU_GR_CTX_GV11B_H */
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h
index 30cc7f0a..a4b8fa91 100644
--- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h
@@ -22,8 +22,8 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#ifndef _NVGPU_GR_GV11B_H_
-#define _NVGPU_GR_GV11B_H_
+#ifndef NVGPU_GR_GV11B_H
+#define NVGPU_GR_GV11B_H
 
 #define EGPC_PRI_BASE        0x580000
 #define EGPC_PRI_SHARED_BASE 0x480000
@@ -258,4 +258,4 @@ void gr_gv11b_set_skedcheck(struct gk20a *g, u32 data);
 void gr_gv11b_set_go_idle_timeout(struct gk20a *g, u32 data);
 void gr_gv11b_set_coalesce_buffer_size(struct gk20a *g, u32 data);
 void gr_gv11b_set_tex_in_dbg(struct gk20a *g, u32 data);
-#endif
+#endif /* NVGPU_GR_GV11B_H */
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.h b/drivers/gpu/nvgpu/gv11b/hal_gv11b.h
index 668353dc..d5b7ad01 100644
--- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.h
@@ -1,7 +1,7 @@
 /*
  * GV11B Tegra HAL interface
  *
- * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -22,10 +22,10 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#ifndef _NVGPU_HAL_GV11B_H
-#define _NVGPU_HAL_GV11B_H
+#ifndef NVGPU_HAL_GV11B_H
+#define NVGPU_HAL_GV11B_H
 struct gk20a;
 
 int gv11b_init_hal(struct gk20a *gops);
 int gv11b_get_litter_value(struct gk20a *g, int value);
-#endif
+#endif /* NVGPU_HAL_GV11B_H */
diff --git a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.h b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.h
index dd6db10c..9cb6b222 100644
--- a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.h
@@ -1,7 +1,7 @@
 /*
  * GV11B PMU
  *
- * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -22,8 +22,8 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#ifndef __PMU_GV11B_H_
-#define __PMU_GV11B_H_
+#ifndef NVGPU_PMU_GV11B_H
+#define NVGPU_PMU_GV11B_H
 
 struct gk20a;
 
@@ -37,4 +37,4 @@ int gv11b_pmu_setup_elpg(struct gk20a *g);
 
 u32 gv11b_pmu_get_irqdest(struct gk20a *g);
 void gv11b_pmu_handle_ext_irq(struct gk20a *g, u32 intr0);
-#endif /*__PMU_GV11B_H_*/
+#endif /* NVGPU_PMU_GV11B_H */
diff --git a/drivers/gpu/nvgpu/gv11b/regops_gv11b.h b/drivers/gpu/nvgpu/gv11b/regops_gv11b.h
index b605c0a6..b445a2b1 100644
--- a/drivers/gpu/nvgpu/gv11b/regops_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/regops_gv11b.h
@@ -22,8 +22,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef __REGOPS_GV11B_H_
-#define __REGOPS_GV11B_H_
+#ifndef NVGPU_REGOPS_GV11B_H
+#define NVGPU_REGOPS_GV11B_H
 
 const struct regop_offset_range *gv11b_get_global_whitelist_ranges(void);
 u64 gv11b_get_global_whitelist_ranges_count(void);
@@ -39,4 +39,4 @@ const struct regop_offset_range *gv11b_get_qctl_whitelist_ranges(void);
 u64 gv11b_get_qctl_whitelist_ranges_count(void);
 int gv11b_apply_smpc_war(struct dbg_session_gk20a *dbg_s);
 
-#endif /* __REGOPS_GV11B_H_ */
+#endif /* NVGPU_REGOPS_GV11B_H */
diff --git a/drivers/gpu/nvgpu/gv11b/subctx_gv11b.h b/drivers/gpu/nvgpu/gv11b/subctx_gv11b.h
index 71d56502..39f901a9 100644
--- a/drivers/gpu/nvgpu/gv11b/subctx_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/subctx_gv11b.h
@@ -22,8 +22,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef __SUBCONTEXT_GV11B_H__
-#define __SUBCONTEXT_GV11B_H__
+#ifndef NVGPU_SUBCTX_GV11B_H
+#define NVGPU_SUBCTX_GV11B_H
 
 int gv11b_alloc_subctx_header(struct channel_gk20a *c);
 
@@ -35,4 +35,4 @@ void gv11b_init_subcontext_pdb(struct vm_gk20a *vm,
                                 struct nvgpu_mem *inst_block,
                                 bool replayable);
 
-#endif /* __SUBCONTEXT_GV11B_H__ */
+#endif /* NVGPU_SUBCTX_GV11B_H */