diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2018-08-30 17:05:16 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-13 22:18:24 -0400 |
commit | 7ac0b046a538daa1a3532d3d5ae7cba1ef3295ba (patch) | |
tree | 79e42a4abe1e0c7d2918fa588f50061b90ee3e5f /drivers/gpu/nvgpu/gv11b | |
parent | bf14c2a0faf922073eaf72d490bf8bde8df1a5c7 (diff) |
gpu: nvgpu: Move MC HAL to common
Move implementation of MC HAL to common/mc. Also bump gk20a
implementation to gm20b.
gk20a_mc_boot_0 was used via a HAL, but we have only one possible
implementation. It also has to be anyway called directly to detect
which HALs to assign, so make it a true common function.
mc_gk20a_handle_intr_nonstall was also used only in os/linux/intr.c
so move it there.
JIRA NVGPU-954
Change-Id: I79aedc9158f90d578db0edc17b714617b52690ac
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1813519
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 15 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/mc_gv11b.c | 90 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/mc_gv11b.h | 31 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/mm_gv11b.c | 1 |
5 files changed, 7 insertions, 131 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c index 64b8084e..4632d3f8 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | |||
@@ -59,7 +59,6 @@ | |||
59 | #include "fifo_gv11b.h" | 59 | #include "fifo_gv11b.h" |
60 | #include "subctx_gv11b.h" | 60 | #include "subctx_gv11b.h" |
61 | #include "gr_gv11b.h" | 61 | #include "gr_gv11b.h" |
62 | #include "mc_gv11b.h" | ||
63 | 62 | ||
64 | void gv11b_get_tsg_runlist_entry(struct tsg_gk20a *tsg, u32 *runlist) | 63 | void gv11b_get_tsg_runlist_entry(struct tsg_gk20a *tsg, u32 *runlist) |
65 | { | 64 | { |
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index a27d9ab5..91122fba 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -40,12 +40,14 @@ | |||
40 | #include "common/ltc/ltc_gv11b.h" | 40 | #include "common/ltc/ltc_gv11b.h" |
41 | #include "common/fuse/fuse_gm20b.h" | 41 | #include "common/fuse/fuse_gm20b.h" |
42 | #include "common/fuse/fuse_gp10b.h" | 42 | #include "common/fuse/fuse_gp10b.h" |
43 | #include "common/mc/mc_gm20b.h" | ||
44 | #include "common/mc/mc_gp10b.h" | ||
45 | #include "common/mc/mc_gv11b.h" | ||
43 | 46 | ||
44 | #include "gk20a/gk20a.h" | 47 | #include "gk20a/gk20a.h" |
45 | #include "gk20a/fifo_gk20a.h" | 48 | #include "gk20a/fifo_gk20a.h" |
46 | #include "gk20a/fecs_trace_gk20a.h" | 49 | #include "gk20a/fecs_trace_gk20a.h" |
47 | #include "gk20a/css_gr_gk20a.h" | 50 | #include "gk20a/css_gr_gk20a.h" |
48 | #include "gk20a/mc_gk20a.h" | ||
49 | #include "gk20a/mm_gk20a.h" | 51 | #include "gk20a/mm_gk20a.h" |
50 | #include "gk20a/dbg_gpu_gk20a.h" | 52 | #include "gk20a/dbg_gpu_gk20a.h" |
51 | #include "gk20a/flcn_gk20a.h" | 53 | #include "gk20a/flcn_gk20a.h" |
@@ -59,7 +61,6 @@ | |||
59 | #include "gm20b/acr_gm20b.h" | 61 | #include "gm20b/acr_gm20b.h" |
60 | #include "gm20b/pmu_gm20b.h" | 62 | #include "gm20b/pmu_gm20b.h" |
61 | 63 | ||
62 | #include "gp10b/mc_gp10b.h" | ||
63 | #include "gp10b/ce_gp10b.h" | 64 | #include "gp10b/ce_gp10b.h" |
64 | #include "gp10b/fifo_gp10b.h" | 65 | #include "gp10b/fifo_gp10b.h" |
65 | #include "gp10b/fecs_trace_gp10b.h" | 66 | #include "gp10b/fecs_trace_gp10b.h" |
@@ -76,7 +77,6 @@ | |||
76 | #include "hal_gv11b.h" | 77 | #include "hal_gv11b.h" |
77 | #include "css_gr_gv11b.h" | 78 | #include "css_gr_gv11b.h" |
78 | #include "gr_gv11b.h" | 79 | #include "gr_gv11b.h" |
79 | #include "mc_gv11b.h" | ||
80 | #include "gv11b.h" | 80 | #include "gv11b.h" |
81 | #include "ce_gv11b.h" | 81 | #include "ce_gv11b.h" |
82 | #include "gr_ctx_gv11b.h" | 82 | #include "gr_ctx_gv11b.h" |
@@ -736,11 +736,10 @@ static const struct gpu_ops gv11b_ops = { | |||
736 | .intr_nonstall = mc_gp10b_intr_nonstall, | 736 | .intr_nonstall = mc_gp10b_intr_nonstall, |
737 | .intr_nonstall_pause = mc_gp10b_intr_nonstall_pause, | 737 | .intr_nonstall_pause = mc_gp10b_intr_nonstall_pause, |
738 | .intr_nonstall_resume = mc_gp10b_intr_nonstall_resume, | 738 | .intr_nonstall_resume = mc_gp10b_intr_nonstall_resume, |
739 | .isr_nonstall = mc_gk20a_isr_nonstall, | 739 | .isr_nonstall = gm20b_mc_isr_nonstall, |
740 | .enable = gk20a_mc_enable, | 740 | .enable = gm20b_mc_enable, |
741 | .disable = gk20a_mc_disable, | 741 | .disable = gm20b_mc_disable, |
742 | .reset = gk20a_mc_reset, | 742 | .reset = gm20b_mc_reset, |
743 | .boot_0 = gk20a_mc_boot_0, | ||
744 | .is_intr1_pending = mc_gp10b_is_intr1_pending, | 743 | .is_intr1_pending = mc_gp10b_is_intr1_pending, |
745 | .log_pending_intrs = mc_gp10b_log_pending_intrs, | 744 | .log_pending_intrs = mc_gp10b_log_pending_intrs, |
746 | .is_intr_hub_pending = gv11b_mc_is_intr_hub_pending, | 745 | .is_intr_hub_pending = gv11b_mc_is_intr_hub_pending, |
diff --git a/drivers/gpu/nvgpu/gv11b/mc_gv11b.c b/drivers/gpu/nvgpu/gv11b/mc_gv11b.c deleted file mode 100644 index c8072d13..00000000 --- a/drivers/gpu/nvgpu/gv11b/mc_gv11b.c +++ /dev/null | |||
@@ -1,90 +0,0 @@ | |||
1 | /* | ||
2 | * GV11B master | ||
3 | * | ||
4 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
7 | * copy of this software and associated documentation files (the "Software"), | ||
8 | * to deal in the Software without restriction, including without limitation | ||
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
10 | * and/or sell copies of the Software, and to permit persons to whom the | ||
11 | * Software is furnished to do so, subject to the following conditions: | ||
12 | * | ||
13 | * The above copyright notice and this permission notice shall be included in | ||
14 | * all copies or substantial portions of the Software. | ||
15 | * | ||
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
22 | * DEALINGS IN THE SOFTWARE. | ||
23 | */ | ||
24 | |||
25 | #include <nvgpu/types.h> | ||
26 | #include <nvgpu/io.h> | ||
27 | |||
28 | #include "gk20a/gk20a.h" | ||
29 | |||
30 | #include "gp10b/mc_gp10b.h" | ||
31 | |||
32 | #include "mc_gv11b.h" | ||
33 | |||
34 | #include <nvgpu/hw/gv11b/hw_mc_gv11b.h> | ||
35 | |||
36 | void mc_gv11b_intr_enable(struct gk20a *g) | ||
37 | { | ||
38 | u32 eng_intr_mask = gk20a_fifo_engine_interrupt_mask(g); | ||
39 | |||
40 | gk20a_writel(g, mc_intr_en_clear_r(NVGPU_MC_INTR_STALLING), | ||
41 | 0xffffffffU); | ||
42 | gk20a_writel(g, mc_intr_en_clear_r(NVGPU_MC_INTR_NONSTALLING), | ||
43 | 0xffffffffU); | ||
44 | |||
45 | g->mc_intr_mask_restore[NVGPU_MC_INTR_STALLING] = | ||
46 | mc_intr_pfifo_pending_f() | | ||
47 | mc_intr_hub_pending_f() | | ||
48 | mc_intr_priv_ring_pending_f() | | ||
49 | mc_intr_pbus_pending_f() | | ||
50 | mc_intr_ltc_pending_f() | | ||
51 | eng_intr_mask; | ||
52 | |||
53 | g->mc_intr_mask_restore[NVGPU_MC_INTR_NONSTALLING] = | ||
54 | mc_intr_pfifo_pending_f() | ||
55 | | eng_intr_mask; | ||
56 | |||
57 | gk20a_writel(g, mc_intr_en_set_r(NVGPU_MC_INTR_STALLING), | ||
58 | g->mc_intr_mask_restore[NVGPU_MC_INTR_STALLING]); | ||
59 | |||
60 | gk20a_writel(g, mc_intr_en_set_r(NVGPU_MC_INTR_NONSTALLING), | ||
61 | g->mc_intr_mask_restore[NVGPU_MC_INTR_NONSTALLING]); | ||
62 | |||
63 | } | ||
64 | |||
65 | bool gv11b_mc_is_intr_hub_pending(struct gk20a *g, u32 mc_intr_0) | ||
66 | { | ||
67 | return (((mc_intr_0 & mc_intr_hub_pending_f()) != 0U) ? true : false); | ||
68 | } | ||
69 | |||
70 | bool gv11b_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id, | ||
71 | u32 *eng_intr_pending) | ||
72 | { | ||
73 | u32 mc_intr_0 = gk20a_readl(g, mc_intr_r(0)); | ||
74 | u32 stall_intr, eng_intr_mask; | ||
75 | |||
76 | eng_intr_mask = gk20a_fifo_act_eng_interrupt_mask(g, act_eng_id); | ||
77 | *eng_intr_pending = mc_intr_0 & eng_intr_mask; | ||
78 | |||
79 | stall_intr = mc_intr_pfifo_pending_f() | | ||
80 | mc_intr_hub_pending_f() | | ||
81 | mc_intr_priv_ring_pending_f() | | ||
82 | mc_intr_pbus_pending_f() | | ||
83 | mc_intr_ltc_pending_f(); | ||
84 | |||
85 | nvgpu_log(g, gpu_dbg_info | gpu_dbg_intr, | ||
86 | "mc_intr_0 = 0x%08x, eng_intr = 0x%08x", | ||
87 | mc_intr_0 & stall_intr, *eng_intr_pending); | ||
88 | |||
89 | return (mc_intr_0 & (eng_intr_mask | stall_intr)) != 0U; | ||
90 | } | ||
diff --git a/drivers/gpu/nvgpu/gv11b/mc_gv11b.h b/drivers/gpu/nvgpu/gv11b/mc_gv11b.h deleted file mode 100644 index faa4d38d..00000000 --- a/drivers/gpu/nvgpu/gv11b/mc_gv11b.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
20 | * DEALINGS IN THE SOFTWARE. | ||
21 | */ | ||
22 | |||
23 | #ifndef MC_GV11B_H | ||
24 | #define MC_GV11B_H | ||
25 | struct gk20a; | ||
26 | |||
27 | void mc_gv11b_intr_enable(struct gk20a *g); | ||
28 | bool gv11b_mc_is_intr_hub_pending(struct gk20a *g, u32 mc_intr_0); | ||
29 | bool gv11b_mc_is_stall_and_eng_intr_pending(struct gk20a *g, u32 act_eng_id, | ||
30 | u32 *eng_intr_pending); | ||
31 | #endif | ||
diff --git a/drivers/gpu/nvgpu/gv11b/mm_gv11b.c b/drivers/gpu/nvgpu/gv11b/mm_gv11b.c index ceadc1c1..5d5aed94 100644 --- a/drivers/gpu/nvgpu/gv11b/mm_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/mm_gv11b.c | |||
@@ -32,7 +32,6 @@ | |||
32 | #include "gk20a/mm_gk20a.h" | 32 | #include "gk20a/mm_gk20a.h" |
33 | 33 | ||
34 | #include "gp10b/mm_gp10b.h" | 34 | #include "gp10b/mm_gp10b.h" |
35 | #include "gp10b/mc_gp10b.h" | ||
36 | 35 | ||
37 | #include "mm_gv11b.h" | 36 | #include "mm_gv11b.h" |
38 | #include "subctx_gv11b.h" | 37 | #include "subctx_gv11b.h" |