gpu: nvgpu: invoke calls to methods in pmu_gk20a.h via HAL

In nvgpu repository, we have multiple accesses to methods in
pmu_gk20a.h which have register accesses. Instead of directly invoking
these methods, these are now called via HALs. Some common methods such
as pmu_wait_message_cond which donot have any register accesses
are moved to pmu_ipc.c and the method declarations are moved
to pmu.h. Also, changed gm20b_pmu_dbg to
nvgpu_dbg_pmu all across the code base. This would remove all
indirect dependencies via gk20a.h into pmu_gk20a.h. As a result
pmu_gk20a.h is now removed from gk20a.h

JIRA-597

Change-Id: Id54b2684ca39362fda7626238c3116cd49e92080
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1804283
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2 files changed, 10 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/acr_gv11b.c b/drivers/gpu/nvgpu/gv11b/acr_gv11b.c
index a6bbaa40..e27c1760 100644
--- a/drivers/gpu/nvgpu/gv11b/acr_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/acr_gv11b.c
@@ -37,7 +37,6 @@
 #include "gk20a/gk20a.h"
 #include "acr_gv11b.h"
 #include "pmu_gv11b.h"
-#include "gk20a/pmu_gk20a.h"
 #include "gm20b/mm_gm20b.h"
 #include "gm20b/acr_gm20b.h"
 #include "gp106/acr_gp106.h"
@@ -287,7 +286,7 @@ int gv11b_init_pmu_setup_hw1(struct gk20a *g,
 
         /*disable irqs for hs falcon booting as we will poll for halt*/
         nvgpu_mutex_acquire(&pmu->isr_mutex);
-        pmu_enable_irq(pmu, false);
+        g->ops.pmu.pmu_enable_irq(pmu, false);
         pmu->isr_enabled = false;
         nvgpu_mutex_release(&pmu->isr_mutex);
         /*Clearing mailbox register used to reflect capabilities*/
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
index cf669aa7..a728d989 100644
--- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
@@ -680,6 +680,15 @@ static const struct gpu_ops gv11b_ops = {
                 .pmu_mutex_size = pwr_pmu_mutex__size_1_v,
                 .pmu_mutex_acquire = gk20a_pmu_mutex_acquire,
                 .pmu_mutex_release = gk20a_pmu_mutex_release,
+                .pmu_is_interrupted = gk20a_pmu_is_interrupted,
+                .pmu_isr = gk20a_pmu_isr,
+                .pmu_init_perfmon_counter = gk20a_pmu_init_perfmon_counter,
+                .pmu_pg_idle_counter_config = gk20a_pmu_pg_idle_counter_config,
+                .pmu_read_idle_counter = gk20a_pmu_read_idle_counter,
+                .pmu_reset_idle_counter = gk20a_pmu_reset_idle_counter,
+                .pmu_dump_elpg_stats = gk20a_pmu_dump_elpg_stats,
+                .pmu_dump_falcon_stats = gk20a_pmu_dump_falcon_stats,
+                .pmu_enable_irq = gk20a_pmu_enable_irq,
                 .write_dmatrfbase = gp10b_write_dmatrfbase,
                 .pmu_elpg_statistics = gp106_pmu_elpg_statistics,
                 .pmu_init_perfmon = nvgpu_pmu_init_perfmon_rpc,