diff options
author | seshendra Gadagottu <sgadagottu@nvidia.com> | 2018-07-09 19:25:40 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-07-24 19:10:58 -0400 |
commit | 69be500c0b6fab324a34fc0b0f6b80f21a128c7e (patch) | |
tree | 2edc7920defdaface49b538f5a1abbd78aa03bcf /drivers/gpu/nvgpu/gv11b | |
parent | 2c2d9e66710e264d251c0019258eed1dc5bb38f2 (diff) |
gpu: nvgpu: debugfs node to enable/disable ltc_illegal_compstat intr
Added debugfs node under ltc directory with name:
intr_illegal_compstat_enable
Enabling/disabling of ltc_illegal_compstat intr is
possible through debugfs node.
Since ltc state is lost with rail gate, this setting is
cached and will be populated during ltc initialization.
Bug 2099406
Change-Id: I4bf62228dfd2bbb94f87f923f9f4f6e5ad0b07f0
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1774683
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/ltc_gv11b.c | 23 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/ltc_gv11b.h | 3 |
3 files changed, 25 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 08c3097e..0508452c 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -241,6 +241,7 @@ static const struct gpu_ops gv11b_ops = { | |||
241 | .isr = gv11b_ltc_isr, | 241 | .isr = gv11b_ltc_isr, |
242 | .flush = gm20b_flush_ltc, | 242 | .flush = gm20b_flush_ltc, |
243 | .set_enabled = gp10b_ltc_set_enabled, | 243 | .set_enabled = gp10b_ltc_set_enabled, |
244 | .intr_en_illegal_compstat = gv11b_ltc_intr_en_illegal_compstat, | ||
244 | }, | 245 | }, |
245 | .ce2 = { | 246 | .ce2 = { |
246 | .isr_stall = gv11b_ce_isr, | 247 | .isr_stall = gv11b_ce_isr, |
diff --git a/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c b/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c index 3cea4cd4..a040de23 100644 --- a/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/ltc_gv11b.c | |||
@@ -70,10 +70,13 @@ void gv11b_ltc_init_fs_state(struct gk20a *g) | |||
70 | /* Disable LTC interrupts */ | 70 | /* Disable LTC interrupts */ |
71 | reg = gk20a_readl(g, ltc_ltcs_ltss_intr_r()); | 71 | reg = gk20a_readl(g, ltc_ltcs_ltss_intr_r()); |
72 | reg &= ~ltc_ltcs_ltss_intr_en_evicted_cb_m(); | 72 | reg &= ~ltc_ltcs_ltss_intr_en_evicted_cb_m(); |
73 | reg &= ~ltc_ltcs_ltss_intr_en_illegal_compstat_m(); | ||
74 | reg &= ~ltc_ltcs_ltss_intr_en_illegal_compstat_access_m(); | 73 | reg &= ~ltc_ltcs_ltss_intr_en_illegal_compstat_access_m(); |
75 | nvgpu_writel_check(g, ltc_ltcs_ltss_intr_r(), reg); | 74 | nvgpu_writel_check(g, ltc_ltcs_ltss_intr_r(), reg); |
76 | 75 | ||
76 | if (g->ops.ltc.intr_en_illegal_compstat) | ||
77 | g->ops.ltc.intr_en_illegal_compstat(g, | ||
78 | g->ltc_intr_en_illegal_compstat); | ||
79 | |||
77 | /* Enable ECC interrupts */ | 80 | /* Enable ECC interrupts */ |
78 | ltc_intr = gk20a_readl(g, ltc_ltcs_ltss_intr_r()); | 81 | ltc_intr = gk20a_readl(g, ltc_ltcs_ltss_intr_r()); |
79 | ltc_intr |= ltc_ltcs_ltss_intr_en_ecc_sec_error_enabled_f() | | 82 | ltc_intr |= ltc_ltcs_ltss_intr_en_ecc_sec_error_enabled_f() | |
@@ -82,6 +85,24 @@ void gv11b_ltc_init_fs_state(struct gk20a *g) | |||
82 | ltc_intr); | 85 | ltc_intr); |
83 | } | 86 | } |
84 | 87 | ||
88 | void gv11b_ltc_intr_en_illegal_compstat(struct gk20a *g, bool enable) | ||
89 | { | ||
90 | u32 val; | ||
91 | |||
92 | /* disble/enble illegal_compstat interrupt */ | ||
93 | val = gk20a_readl(g, ltc_ltcs_ltss_intr_r()); | ||
94 | if (enable) | ||
95 | val = set_field(val, | ||
96 | ltc_ltcs_ltss_intr_en_illegal_compstat_m(), | ||
97 | ltc_ltcs_ltss_intr_en_illegal_compstat_enabled_f()); | ||
98 | else | ||
99 | val = set_field(val, | ||
100 | ltc_ltcs_ltss_intr_en_illegal_compstat_m(), | ||
101 | ltc_ltcs_ltss_intr_en_illegal_compstat_disabled_f()); | ||
102 | gk20a_writel(g, ltc_ltcs_ltss_intr_r(), val); | ||
103 | } | ||
104 | |||
105 | |||
85 | void gv11b_ltc_isr(struct gk20a *g) | 106 | void gv11b_ltc_isr(struct gk20a *g) |
86 | { | 107 | { |
87 | u32 mc_intr, ltc_intr3; | 108 | u32 mc_intr, ltc_intr3; |
diff --git a/drivers/gpu/nvgpu/gv11b/ltc_gv11b.h b/drivers/gpu/nvgpu/gv11b/ltc_gv11b.h index 8309e662..9d33b9fb 100644 --- a/drivers/gpu/nvgpu/gv11b/ltc_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/ltc_gv11b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -28,6 +28,7 @@ void gv11b_ltc_set_zbc_stencil_entry(struct gk20a *g, | |||
28 | struct zbc_entry *stencil_val, | 28 | struct zbc_entry *stencil_val, |
29 | u32 index); | 29 | u32 index); |
30 | void gv11b_ltc_init_fs_state(struct gk20a *g); | 30 | void gv11b_ltc_init_fs_state(struct gk20a *g); |
31 | void gv11b_ltc_intr_en_illegal_compstat(struct gk20a *g, bool enable); | ||
31 | void gv11b_ltc_isr(struct gk20a *g); | 32 | void gv11b_ltc_isr(struct gk20a *g); |
32 | 33 | ||
33 | #endif | 34 | #endif |