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authorTerje Bergstrom <tbergstrom@nvidia.com>2018-08-30 18:18:11 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-13 22:18:35 -0400
commit1d9d7c04bbbaa38080c3c8f256546bd63f65d494 (patch)
treeeb130549cf93074b1d928f5cc7bd5f103678f091 /drivers/gpu/nvgpu/gv11b
parent72f6c441c80a2c697230400bf042e7b96bffca72 (diff)
gpu: nvgpu: Wait for empty always has GR enabled
Whenever wait for empty HAL is called, GR is out of reset. Check for GR being out of reset was adding an extra dependency to MC, so just remove that code. JIRA NVGPU-964 Change-Id: Ic6d607fd2e29359a67896973517d8de6542029e9 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1813522 Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b')
-rw-r--r--drivers/gpu/nvgpu/gv11b/gr_gv11b.c7
1 files changed, 1 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
index 4f7468b3..2596d400 100644
--- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
@@ -57,7 +57,6 @@
57#include <nvgpu/hw/gv11b/hw_fifo_gv11b.h> 57#include <nvgpu/hw/gv11b/hw_fifo_gv11b.h>
58#include <nvgpu/hw/gv11b/hw_proj_gv11b.h> 58#include <nvgpu/hw/gv11b/hw_proj_gv11b.h>
59#include <nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h> 59#include <nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h>
60#include <nvgpu/hw/gv11b/hw_mc_gv11b.h>
61#include <nvgpu/hw/gv11b/hw_ram_gv11b.h> 60#include <nvgpu/hw/gv11b/hw_ram_gv11b.h>
62#include <nvgpu/hw/gv11b/hw_pbdma_gv11b.h> 61#include <nvgpu/hw/gv11b/hw_pbdma_gv11b.h>
63#include <nvgpu/hw/gv11b/hw_perf_gv11b.h> 62#include <nvgpu/hw/gv11b/hw_perf_gv11b.h>
@@ -2050,7 +2049,6 @@ int gr_gv11b_wait_empty(struct gk20a *g, unsigned long duration_ms,
2050 u32 expect_delay) 2049 u32 expect_delay)
2051{ 2050{
2052 u32 delay = expect_delay; 2051 u32 delay = expect_delay;
2053 bool gr_enabled;
2054 bool ctxsw_active; 2052 bool ctxsw_active;
2055 bool gr_busy; 2053 bool gr_busy;
2056 u32 gr_status; 2054 u32 gr_status;
@@ -2066,9 +2064,6 @@ int gr_gv11b_wait_empty(struct gk20a *g, unsigned long duration_ms,
2066 only when gr_status is read */ 2064 only when gr_status is read */
2067 gr_status = gk20a_readl(g, gr_status_r()); 2065 gr_status = gk20a_readl(g, gr_status_r());
2068 2066
2069 gr_enabled = gk20a_readl(g, mc_enable_r()) &
2070 mc_enable_pgraph_enabled_f();
2071
2072 ctxsw_active = gr_status & 1<<7; 2067 ctxsw_active = gr_status & 1<<7;
2073 2068
2074 activity0 = gk20a_readl(g, gr_activity_0_r()); 2069 activity0 = gk20a_readl(g, gr_activity_0_r());
@@ -2081,7 +2076,7 @@ int gr_gv11b_wait_empty(struct gk20a *g, unsigned long duration_ms,
2081 activity2 == 0 && 2076 activity2 == 0 &&
2082 gr_activity_empty_or_preempted(activity4)); 2077 gr_activity_empty_or_preempted(activity4));
2083 2078
2084 if (!gr_enabled || (!gr_busy && !ctxsw_active)) { 2079 if (!gr_busy && !ctxsw_active) {
2085 nvgpu_log_fn(g, "done"); 2080 nvgpu_log_fn(g, "done");
2086 return 0; 2081 return 0;
2087 } 2082 }