diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2018-08-09 12:20:33 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-08-14 18:33:20 -0400 |
commit | 91390d857f6302f9c2923ec4188ea7e24ee537a2 (patch) | |
tree | e0884e79ea748d2c0bd384c29f805125a7b88fec /drivers/gpu/nvgpu/gv11b/therm_gv11b.c | |
parent | 02f9c99e4b4a452ded20978c5ee1e27b775b9224 (diff) |
gpu: nvgpu: Move therm HAL to common
Move implementation of therm HAL to common/therm. ELCG and BLCG
code was embedded in gr HAL, so moved that code to therm.
Bump gk20a code to gm20b.
JIRA NVGPU-955
Change-Id: I9b03e52f2832d3a1d89071a577e8ce106aaf603b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1795989
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/therm_gv11b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/therm_gv11b.c | 148 |
1 files changed, 0 insertions, 148 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/therm_gv11b.c b/drivers/gpu/nvgpu/gv11b/therm_gv11b.c deleted file mode 100644 index acc2c509..00000000 --- a/drivers/gpu/nvgpu/gv11b/therm_gv11b.c +++ /dev/null | |||
@@ -1,148 +0,0 @@ | |||
1 | /* | ||
2 | * GV11B Therm | ||
3 | * | ||
4 | * Copyright (c) 2015-2018, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
7 | * copy of this software and associated documentation files (the "Software"), | ||
8 | * to deal in the Software without restriction, including without limitation | ||
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
10 | * and/or sell copies of the Software, and to permit persons to whom the | ||
11 | * Software is furnished to do so, subject to the following conditions: | ||
12 | * | ||
13 | * The above copyright notice and this permission notice shall be included in | ||
14 | * all copies or substantial portions of the Software. | ||
15 | * | ||
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
22 | * DEALINGS IN THE SOFTWARE. | ||
23 | */ | ||
24 | |||
25 | #include "gk20a/gk20a.h" | ||
26 | #include "therm_gv11b.h" | ||
27 | |||
28 | #include <nvgpu/soc.h> | ||
29 | #include <nvgpu/io.h> | ||
30 | #include <nvgpu/utils.h> | ||
31 | |||
32 | #include <nvgpu/hw/gv11b/hw_therm_gv11b.h> | ||
33 | |||
34 | #include "therm_gv11b.h" | ||
35 | |||
36 | int gv11b_init_therm_setup_hw(struct gk20a *g) | ||
37 | { | ||
38 | u32 v; | ||
39 | |||
40 | nvgpu_log_fn(g, " "); | ||
41 | |||
42 | /* program NV_THERM registers */ | ||
43 | gk20a_writel(g, therm_use_a_r(), therm_use_a_ext_therm_0_enable_f() | | ||
44 | therm_use_a_ext_therm_1_enable_f() | | ||
45 | therm_use_a_ext_therm_2_enable_f()); | ||
46 | gk20a_writel(g, therm_evt_ext_therm_0_r(), | ||
47 | therm_evt_ext_therm_0_slow_factor_f(0x2)); | ||
48 | gk20a_writel(g, therm_evt_ext_therm_1_r(), | ||
49 | therm_evt_ext_therm_1_slow_factor_f(0x6)); | ||
50 | gk20a_writel(g, therm_evt_ext_therm_2_r(), | ||
51 | therm_evt_ext_therm_2_slow_factor_f(0xe)); | ||
52 | |||
53 | gk20a_writel(g, therm_grad_stepping_table_r(0), | ||
54 | therm_grad_stepping_table_slowdown_factor0_f( | ||
55 | therm_grad_stepping_table_slowdown_factor0_fpdiv_by1_f()) | | ||
56 | therm_grad_stepping_table_slowdown_factor1_f( | ||
57 | therm_grad_stepping_table_slowdown_factor0_fpdiv_by1p5_f()) | | ||
58 | therm_grad_stepping_table_slowdown_factor2_f( | ||
59 | therm_grad_stepping_table_slowdown_factor0_fpdiv_by2_f()) | | ||
60 | therm_grad_stepping_table_slowdown_factor3_f( | ||
61 | therm_grad_stepping_table_slowdown_factor0_fpdiv_by4_f()) | | ||
62 | therm_grad_stepping_table_slowdown_factor4_f( | ||
63 | therm_grad_stepping_table_slowdown_factor0_fpdiv_by8_f())); | ||
64 | |||
65 | gk20a_writel(g, therm_grad_stepping_table_r(1), | ||
66 | therm_grad_stepping_table_slowdown_factor0_f( | ||
67 | therm_grad_stepping_table_slowdown_factor0_fpdiv_by16_f()) | | ||
68 | therm_grad_stepping_table_slowdown_factor1_f( | ||
69 | therm_grad_stepping_table_slowdown_factor0_fpdiv_by32_f()) | | ||
70 | therm_grad_stepping_table_slowdown_factor2_f( | ||
71 | therm_grad_stepping_table_slowdown_factor0_fpdiv_by32_f()) | | ||
72 | therm_grad_stepping_table_slowdown_factor3_f( | ||
73 | therm_grad_stepping_table_slowdown_factor0_fpdiv_by32_f()) | | ||
74 | therm_grad_stepping_table_slowdown_factor4_f( | ||
75 | therm_grad_stepping_table_slowdown_factor0_fpdiv_by32_f())); | ||
76 | |||
77 | v = gk20a_readl(g, therm_clk_timing_r(0)); | ||
78 | v |= therm_clk_timing_grad_slowdown_enabled_f(); | ||
79 | gk20a_writel(g, therm_clk_timing_r(0), v); | ||
80 | |||
81 | v = gk20a_readl(g, therm_config2_r()); | ||
82 | v |= therm_config2_grad_enable_f(1); | ||
83 | v |= therm_config2_slowdown_factor_extended_f(1); | ||
84 | v = set_field(v, therm_config2_grad_step_duration_m(), | ||
85 | therm_config2_grad_step_duration_f(0)); | ||
86 | gk20a_writel(g, therm_config2_r(), v); | ||
87 | |||
88 | gk20a_writel(g, therm_grad_stepping1_r(), | ||
89 | therm_grad_stepping1_pdiv_duration_f(0xbf4)); | ||
90 | |||
91 | v = gk20a_readl(g, therm_grad_stepping0_r()); | ||
92 | v |= therm_grad_stepping0_feature_enable_f(); | ||
93 | gk20a_writel(g, therm_grad_stepping0_r(), v); | ||
94 | |||
95 | /* disable idle clock slowdown */ | ||
96 | v = therm_clk_slowdown_2_idle_condition_a_select_f(0) | | ||
97 | therm_clk_slowdown_2_idle_condition_a_type_never_f() | | ||
98 | therm_clk_slowdown_2_idle_condition_b_type_never_f(); | ||
99 | gk20a_writel(g, therm_clk_slowdown_2_r(0), v); | ||
100 | |||
101 | return 0; | ||
102 | } | ||
103 | |||
104 | int gv11b_elcg_init_idle_filters(struct gk20a *g) | ||
105 | { | ||
106 | u32 gate_ctrl, idle_filter; | ||
107 | u32 engine_id; | ||
108 | u32 active_engine_id = 0; | ||
109 | struct fifo_gk20a *f = &g->fifo; | ||
110 | |||
111 | if (nvgpu_platform_is_simulation(g)) | ||
112 | return 0; | ||
113 | |||
114 | nvgpu_log_info(g, "init clock/power gate reg"); | ||
115 | |||
116 | for (engine_id = 0; engine_id < f->num_engines; engine_id++) { | ||
117 | active_engine_id = f->active_engines_list[engine_id]; | ||
118 | |||
119 | gate_ctrl = gk20a_readl(g, therm_gate_ctrl_r(active_engine_id)); | ||
120 | gate_ctrl = set_field(gate_ctrl, | ||
121 | therm_gate_ctrl_eng_idle_filt_exp_m(), | ||
122 | therm_gate_ctrl_eng_idle_filt_exp__prod_f()); | ||
123 | gate_ctrl = set_field(gate_ctrl, | ||
124 | therm_gate_ctrl_eng_idle_filt_mant_m(), | ||
125 | therm_gate_ctrl_eng_idle_filt_mant__prod_f()); | ||
126 | gate_ctrl = set_field(gate_ctrl, | ||
127 | therm_gate_ctrl_eng_delay_before_m(), | ||
128 | therm_gate_ctrl_eng_delay_before__prod_f()); | ||
129 | gate_ctrl = set_field(gate_ctrl, | ||
130 | therm_gate_ctrl_eng_delay_after_m(), | ||
131 | therm_gate_ctrl_eng_delay_after__prod_f()); | ||
132 | gk20a_writel(g, therm_gate_ctrl_r(active_engine_id), gate_ctrl); | ||
133 | } | ||
134 | |||
135 | idle_filter = gk20a_readl(g, therm_fecs_idle_filter_r()); | ||
136 | idle_filter = set_field(idle_filter, | ||
137 | therm_fecs_idle_filter_value_m(), | ||
138 | therm_fecs_idle_filter_value__prod_f()); | ||
139 | gk20a_writel(g, therm_fecs_idle_filter_r(), idle_filter); | ||
140 | |||
141 | idle_filter = gk20a_readl(g, therm_hubmmu_idle_filter_r()); | ||
142 | idle_filter = set_field(idle_filter, | ||
143 | therm_hubmmu_idle_filter_value_m(), | ||
144 | therm_hubmmu_idle_filter_value__prod_f()); | ||
145 | gk20a_writel(g, therm_hubmmu_idle_filter_r(), idle_filter); | ||
146 | |||
147 | return 0; | ||
148 | } | ||