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authorseshendra Gadagottu <sgadagottu@nvidia.com>2018-02-08 21:50:58 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2018-02-13 19:27:28 -0500
commiteb03270ff65b0fa52d080c2e8700acdf42b9ddee (patch)
treed555b9f85778f56354d2118f5e16dd573a6b4706 /drivers/gpu/nvgpu/gv11b/subctx_gv11b.c
parentcc53490af534e7acf1764081756bf12c1e3a45ee (diff)
gpu: nvgpu: gv11b: update subctx pdb info
Updated subctx pdb info for all instblks created. Earlier subctx pdb info was getting updated during instblk commit. But some instblks like pmu instblk are never committed. Missing subctx pdb info in instblk is creating issues accessing subctx info. So, by filling subctx pdb info during instblk creation fixed all these issues. Also as part of re-org of the function gv11b_init_subcontext_pdb, moved setting subctx info in ram_in_engine_wfi_veid_w() to channel_gv11b_setup_ramfc. Bug 2051863 Change-Id: Ida96118e8f86b638fa6a8586d026ad2617ebbf64 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1654678 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/subctx_gv11b.c')
-rw-r--r--drivers/gpu/nvgpu/gv11b/subctx_gv11b.c30
1 files changed, 9 insertions, 21 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c b/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c
index 4f98d82a..05d7dee0 100644
--- a/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c
@@ -33,12 +33,9 @@
33#include <nvgpu/hw/gv11b/hw_ram_gv11b.h> 33#include <nvgpu/hw/gv11b/hw_ram_gv11b.h>
34#include <nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h> 34#include <nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h>
35 35
36static void gv11b_init_subcontext_pdb(struct channel_gk20a *c, 36static void gv11b_subctx_commit_valid_mask(struct vm_gk20a *vm,
37 struct nvgpu_mem *inst_block); 37 struct nvgpu_mem *inst_block);
38 38static void gv11b_subctx_commit_pdb(struct vm_gk20a *vm,
39static void gv11b_subctx_commit_valid_mask(struct channel_gk20a *c,
40 struct nvgpu_mem *inst_block);
41static void gv11b_subctx_commit_pdb(struct channel_gk20a *c,
42 struct nvgpu_mem *inst_block); 39 struct nvgpu_mem *inst_block);
43 40
44void gv11b_free_subctx_header(struct channel_gk20a *c) 41void gv11b_free_subctx_header(struct channel_gk20a *c)
@@ -89,23 +86,15 @@ int gv11b_alloc_subctx_header(struct channel_gk20a *c)
89 86
90 nvgpu_memset(g, &ctx->mem, 0, 0, ctx->mem.size); 87 nvgpu_memset(g, &ctx->mem, 0, 0, ctx->mem.size);
91 nvgpu_mem_end(g, &ctx->mem); 88 nvgpu_mem_end(g, &ctx->mem);
92
93 gv11b_init_subcontext_pdb(c, &c->inst_block);
94 } 89 }
95 return ret; 90 return ret;
96} 91}
97 92
98static void gv11b_init_subcontext_pdb(struct channel_gk20a *c, 93void gv11b_init_subcontext_pdb(struct vm_gk20a *vm,
99 struct nvgpu_mem *inst_block) 94 struct nvgpu_mem *inst_block)
100{ 95{
101 struct gk20a *g = c->g; 96 gv11b_subctx_commit_pdb(vm, inst_block);
102 97 gv11b_subctx_commit_valid_mask(vm, inst_block);
103 gv11b_subctx_commit_pdb(c, inst_block);
104 gv11b_subctx_commit_valid_mask(c, inst_block);
105
106 nvgpu_log(g, gpu_dbg_info, " subctx %d instblk set", c->subctx_id);
107 nvgpu_mem_wr32(g, inst_block, ram_in_engine_wfi_veid_w(),
108 ram_in_engine_wfi_veid_f(c->subctx_id));
109 98
110} 99}
111 100
@@ -167,22 +156,21 @@ int gv11b_update_subctx_header(struct channel_gk20a *c, u64 gpu_va)
167 return ret; 156 return ret;
168} 157}
169 158
170void gv11b_subctx_commit_valid_mask(struct channel_gk20a *c, 159void gv11b_subctx_commit_valid_mask(struct vm_gk20a *vm,
171 struct nvgpu_mem *inst_block) 160 struct nvgpu_mem *inst_block)
172{ 161{
173 struct gk20a *g = c->g; 162 struct gk20a *g = gk20a_from_vm(vm);
174 163
175 /* Make all subctx pdbs valid */ 164 /* Make all subctx pdbs valid */
176 nvgpu_mem_wr32(g, inst_block, 166, 0xffffffff); 165 nvgpu_mem_wr32(g, inst_block, 166, 0xffffffff);
177 nvgpu_mem_wr32(g, inst_block, 167, 0xffffffff); 166 nvgpu_mem_wr32(g, inst_block, 167, 0xffffffff);
178} 167}
179 168
180void gv11b_subctx_commit_pdb(struct channel_gk20a *c, 169void gv11b_subctx_commit_pdb(struct vm_gk20a *vm,
181 struct nvgpu_mem *inst_block) 170 struct nvgpu_mem *inst_block)
182{ 171{
183 struct gk20a *g = c->g; 172 struct gk20a *g = gk20a_from_vm(vm);
184 struct fifo_gk20a *f = &g->fifo; 173 struct fifo_gk20a *f = &g->fifo;
185 struct vm_gk20a *vm = c->vm;
186 u32 lo, hi; 174 u32 lo, hi;
187 u32 subctx_id = 0; 175 u32 subctx_id = 0;
188 u32 format_word; 176 u32 format_word;