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authorseshendra Gadagottu <sgadagottu@nvidia.com>2017-01-20 19:18:47 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-01-27 16:54:40 -0500
commitd00b2000b5bb2f39e3610b8321e0872e2b06bd0a (patch)
tree5ca0ae42384ce598033f5a915603d46f5b01113a /drivers/gpu/nvgpu/gv11b/regops_gv11b.h
parent8797934a2663df68c1ee0e896c173266135559f3 (diff)
gpu: nvgpu: gv11b: update zcull and pm pointers
Update zcull and perfmon buffer pointers in context header. For gv11b maximum 49 bits gpu va possible. But, zcull and perfmon buffer pointers uses maximum 41 bit va address (258 bytes aligned). To accommodate this, high pointer registers needs to be updated in context header. JIRA GV11B-48 Change-Id: Ibe62b6bfedd32c4f3721e4d19d96cce58ef0f366 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/1291852 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/regops_gv11b.h')
0 files changed, 0 insertions, 0 deletions