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authorsmadhavan <smadhavan@nvidia.com>2018-09-11 02:16:58 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-18 02:39:59 -0400
commit82c94e22916fb76fbb145e88079130ed4c6a6c32 (patch)
treee6415e3d7fc9f3f545c71fab8a134764f33494e8 /drivers/gpu/nvgpu/gv11b/regops_gv11b.h
parent2517d59be282426eec7a97745b76d745ff36c388 (diff)
nvgpu: gv11b: MISRA Rule 21.2 header guard fixes
MISRA rule 21.2 doesn't allow the use of macro names which start with an underscore. These leading underscores are to be removed from the macro names. This patch will fix such violations in gv11b by renaming them to follow the convention, 'NVGPU_PARENT-DIR_HEADER-NAME' when there is no keyword repetition between file name and directory or 'NVGPU_HEADER-NAME' when there is repetition. JIRA NVGPU-1028 Change-Id: Ibf6b54b2a0d3f4fbfacb554b78b88911341b960f Signed-off-by: smadhavan <smadhavan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1815567 Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Adeel Raza <araza@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/regops_gv11b.h')
-rw-r--r--drivers/gpu/nvgpu/gv11b/regops_gv11b.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/regops_gv11b.h b/drivers/gpu/nvgpu/gv11b/regops_gv11b.h
index b605c0a6..b445a2b1 100644
--- a/drivers/gpu/nvgpu/gv11b/regops_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/regops_gv11b.h
@@ -22,8 +22,8 @@
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE. 23 * DEALINGS IN THE SOFTWARE.
24 */ 24 */
25#ifndef __REGOPS_GV11B_H_ 25#ifndef NVGPU_REGOPS_GV11B_H
26#define __REGOPS_GV11B_H_ 26#define NVGPU_REGOPS_GV11B_H
27 27
28const struct regop_offset_range *gv11b_get_global_whitelist_ranges(void); 28const struct regop_offset_range *gv11b_get_global_whitelist_ranges(void);
29u64 gv11b_get_global_whitelist_ranges_count(void); 29u64 gv11b_get_global_whitelist_ranges_count(void);
@@ -39,4 +39,4 @@ const struct regop_offset_range *gv11b_get_qctl_whitelist_ranges(void);
39u64 gv11b_get_qctl_whitelist_ranges_count(void); 39u64 gv11b_get_qctl_whitelist_ranges_count(void);
40int gv11b_apply_smpc_war(struct dbg_session_gk20a *dbg_s); 40int gv11b_apply_smpc_war(struct dbg_session_gk20a *dbg_s);
41 41
42#endif /* __REGOPS_GV11B_H_ */ 42#endif /* NVGPU_REGOPS_GV11B_H */