diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2018-01-17 15:39:13 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-01-23 01:20:15 -0500 |
commit | f3f14cdff53f4b936e2505d44aad6e3bca143056 (patch) | |
tree | 8d6438132b8ca429758d18142c5f569f60f2bc35 /drivers/gpu/nvgpu/gv11b/pmu_gv11b.c | |
parent | 193a2ed38ca51d898ac811820ab86237c84e18eb (diff) |
gpu: nvgpu: Fold T19x code back to main code paths
Lots of code paths were split to T19x specific code paths and structs
due to split repository. Now that repositories are merged, fold all of
them back to main code paths and structs and remove the T19x specific
Kconfig flag.
Change-Id: Id0d17a5f0610fc0b49f51ab6664e716dc8b222b6
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1640606
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/pmu_gv11b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/pmu_gv11b.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c index a972510f..e4cfe925 100644 --- a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GV11B PMU | 2 | * GV11B PMU |
3 | * | 3 | * |
4 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -343,8 +343,8 @@ void gv11b_pmu_handle_ext_irq(struct gk20a *g, u32 intr0) | |||
343 | if (uncorrected_overflow) | 343 | if (uncorrected_overflow) |
344 | uncorrected_delta += (0x1UL << pwr_pmu_falcon_ecc_uncorrected_err_count_total_s()); | 344 | uncorrected_delta += (0x1UL << pwr_pmu_falcon_ecc_uncorrected_err_count_total_s()); |
345 | 345 | ||
346 | g->ecc.eng.t19x.pmu_corrected_err_count.counters[0] += corrected_delta; | 346 | g->ecc.pmu.pmu_corrected_err_count.counters[0] += corrected_delta; |
347 | g->ecc.eng.t19x.pmu_uncorrected_err_count.counters[0] += uncorrected_delta; | 347 | g->ecc.pmu.pmu_uncorrected_err_count.counters[0] += uncorrected_delta; |
348 | 348 | ||
349 | nvgpu_log(g, gpu_dbg_intr, | 349 | nvgpu_log(g, gpu_dbg_intr, |
350 | "pmu ecc interrupt intr1: 0x%x", intr1); | 350 | "pmu ecc interrupt intr1: 0x%x", intr1); |
@@ -371,8 +371,8 @@ void gv11b_pmu_handle_ext_irq(struct gk20a *g, u32 intr0) | |||
371 | 371 | ||
372 | nvgpu_log(g, gpu_dbg_intr, | 372 | nvgpu_log(g, gpu_dbg_intr, |
373 | "ecc error count corrected: %d, uncorrected %d", | 373 | "ecc error count corrected: %d, uncorrected %d", |
374 | g->ecc.eng.t19x.pmu_corrected_err_count.counters[0], | 374 | g->ecc.pmu.pmu_corrected_err_count.counters[0], |
375 | g->ecc.eng.t19x.pmu_uncorrected_err_count.counters[0]); | 375 | g->ecc.pmu.pmu_uncorrected_err_count.counters[0]); |
376 | } | 376 | } |
377 | } | 377 | } |
378 | } | 378 | } |