diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2017-04-14 19:15:50 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-04-24 03:13:39 -0400 |
commit | e1c27d4e84d518bef88305d1ca848deb07433677 (patch) | |
tree | 1a81b03c60f914020dead7fe5e7ffb4325c233af /drivers/gpu/nvgpu/gv11b/pmu_gv11b.c | |
parent | 7872900486bd31cf186930848adec46d0a13b68a (diff) |
gpu: nvgpu: gv11b: Use new clk HAL
Use the new clk HAL to request clock rate instead of direct calls
to Clock Framework. This cuts one direct dependency to Linux APIs.
Also change the HAL to not clear clk ops after they've been
initialized.
JIRA NVGPU-16
Change-Id: I1ab3eac8268f1f3f3305d49782c6a0eb57c6d617
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1463536
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/pmu_gv11b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/pmu_gv11b.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c index 4cc45197..4784ee4a 100644 --- a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c | |||
@@ -37,7 +37,6 @@ static bool gv11b_is_pmu_supported(struct gk20a *g) | |||
37 | static int gv11b_pmu_bootstrap(struct pmu_gk20a *pmu) | 37 | static int gv11b_pmu_bootstrap(struct pmu_gk20a *pmu) |
38 | { | 38 | { |
39 | struct gk20a *g = gk20a_from_pmu(pmu); | 39 | struct gk20a *g = gk20a_from_pmu(pmu); |
40 | struct gk20a_platform *platform = dev_get_drvdata(g->dev); | ||
41 | struct mm_gk20a *mm = &g->mm; | 40 | struct mm_gk20a *mm = &g->mm; |
42 | struct pmu_ucode_desc *desc = pmu->desc; | 41 | struct pmu_ucode_desc *desc = pmu->desc; |
43 | u64 addr_code_lo, addr_data_lo, addr_load_lo; | 42 | u64 addr_code_lo, addr_data_lo, addr_load_lo; |
@@ -64,7 +63,7 @@ static int gv11b_pmu_bootstrap(struct pmu_gk20a *pmu) | |||
64 | pmu, GK20A_PMU_DMAIDX_VIRT); | 63 | pmu, GK20A_PMU_DMAIDX_VIRT); |
65 | 64 | ||
66 | g->ops.pmu_ver.set_pmu_cmdline_args_cpu_freq(pmu, | 65 | g->ops.pmu_ver.set_pmu_cmdline_args_cpu_freq(pmu, |
67 | clk_get_rate(platform->clk[1])); | 66 | g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_PWRCLK)); |
68 | 67 | ||
69 | addr_args = (pwr_falcon_hwcfg_dmem_size_v( | 68 | addr_args = (pwr_falcon_hwcfg_dmem_size_v( |
70 | gk20a_readl(g, pwr_falcon_hwcfg_r())) | 69 | gk20a_readl(g, pwr_falcon_hwcfg_r())) |