gpu: nvgpu: PMU reset reorg support

- Assigned gv11b pmu engine reset & status
ops to point to gp106 ops.

JIRA NVGPU-99

Change-Id: I6338e2c5a1458e88a62cf0966b59c1dbe73385b6
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master/r/1507884
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

1 files changed, 2 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c
index 01dc207c..ecc77e1b 100644
--- a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c
@@ -240,7 +240,8 @@ void gv11b_init_pmu_ops(struct gpu_ops *gops)
         gp10b_init_pmu_ops(gops);
         gops->pmu.pmu_nsbootstrap = gv11b_pmu_bootstrap;
         gops->pmu.is_pmu_supported = gv11b_is_pmu_supported;
-        gops->pmu.reset = gp106_pmu_reset;
+        gops->pmu.reset_engine = gp106_pmu_engine_reset;
+        gops->pmu.is_engine_in_reset = gp106_pmu_is_engine_in_reset;
         gops->pmu.pmu_get_queue_head = pwr_pmu_queue_head_r;
         gops->pmu.pmu_get_queue_head_size = pwr_pmu_queue_head__size_1_v;
         gops->pmu.pmu_get_queue_tail = pwr_pmu_queue_tail_r;