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| author | Seema Khowala <seemaj@nvidia.com> | 2017-06-27 19:36:48 -0400 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-07-02 13:20:08 -0400 |
| commit | 8a0221cfc735f79c94447ff5922e26c313e0f177 (patch) | |
| tree | b05cd72d9ae236cae90a843e9ecf1cc027d616c6 /drivers/gpu/nvgpu/gv11b/pmu_gv11b.c | |
| parent | 5a57be6ba1d491b4a3258281c82345fdb4a83675 (diff) | |
gpu: nvgpu: gv11b: implement eng method buffer init/deinit
When CE hits a page fault it needs to save out methods, it will
save it out to a per runqueue per TSG method buffer. The method buffers
(one per TSG runqueue) are allocated in BAR2 space during TSG creation
All channels in a TSG that are mapped to the same runqueue will point
to the same buffer.
S/w will insert channel's method buffer pointer in the channel's
instance block entries NV_RAMIN_ENG_METHOD_BUFFER_ADDR_LO and
NV_RAMIN_ENG_METHOD_BUFFER_ADDR_HI. Method buffer in memory will
be 32B aligned.
Eng method buffer allocated per tsg will be de-allocated during
tsg_release.
JIRA GPUT19X-46
Change-Id: Ib480ae5840d9815d24fe2eadc169ac3102854cd0
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master/r/1509747
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/pmu_gv11b.c')
0 files changed, 0 insertions, 0 deletions