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authorRichard Zhao <rizhao@nvidia.com>2018-06-26 20:37:40 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-07-19 19:43:58 -0400
commit7f14aafc2c02eb0fab458324d0ba91a7fdea3086 (patch)
treecda9f48839fbde3444fde521a9b0069eb06cd81a /drivers/gpu/nvgpu/gv11b/pmu_gv11b.c
parent5ff1b3fe5a30c926e59a55ad25dd4daf430c8579 (diff)
gpu: nvgpu: rework ecc structure and sysfs
- create common file common/ecc.c which include common functions for add ecc counters and remove counters. - common code will create a list of all counter which make it easier to iterate all counters. - Add chip specific file for adding ecc counters. - add linux specific file os/linux/ecc_sysfs.c to export counters to sysfs. - remove obsolete code - MISRA violation for using snprintf is not solved, tracking with jira NVGPU-859 Jira NVGPUT-115 Change-Id: I1905c43c5c9b2b131199807533dee8e63ddc12f4 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1763536 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/pmu_gv11b.c')
-rw-r--r--drivers/gpu/nvgpu/gv11b/pmu_gv11b.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c
index 3f0e2f22..9a2e9c00 100644
--- a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c
@@ -343,8 +343,8 @@ void gv11b_pmu_handle_ext_irq(struct gk20a *g, u32 intr0)
343 if (uncorrected_overflow) 343 if (uncorrected_overflow)
344 uncorrected_delta += (0x1UL << pwr_pmu_falcon_ecc_uncorrected_err_count_total_s()); 344 uncorrected_delta += (0x1UL << pwr_pmu_falcon_ecc_uncorrected_err_count_total_s());
345 345
346 g->ecc.pmu.pmu_corrected_err_count.counters[0] += corrected_delta; 346 g->ecc.pmu.pmu_ecc_corrected_err_count[0].counter += corrected_delta;
347 g->ecc.pmu.pmu_uncorrected_err_count.counters[0] += uncorrected_delta; 347 g->ecc.pmu.pmu_ecc_uncorrected_err_count[0].counter += uncorrected_delta;
348 348
349 nvgpu_log(g, gpu_dbg_intr, 349 nvgpu_log(g, gpu_dbg_intr,
350 "pmu ecc interrupt intr1: 0x%x", intr1); 350 "pmu ecc interrupt intr1: 0x%x", intr1);
@@ -371,8 +371,8 @@ void gv11b_pmu_handle_ext_irq(struct gk20a *g, u32 intr0)
371 371
372 nvgpu_log(g, gpu_dbg_intr, 372 nvgpu_log(g, gpu_dbg_intr,
373 "ecc error count corrected: %d, uncorrected %d", 373 "ecc error count corrected: %d, uncorrected %d",
374 g->ecc.pmu.pmu_corrected_err_count.counters[0], 374 g->ecc.pmu.pmu_ecc_corrected_err_count[0].counter,
375 g->ecc.pmu.pmu_uncorrected_err_count.counters[0]); 375 g->ecc.pmu.pmu_ecc_uncorrected_err_count[0].counter);
376 } 376 }
377 } 377 }
378} 378}