gpu: nvgpu: Add ECC Support for GV11B in Linux

Implement nvgpu plumbing to allow reporting ECC errors(corrected
and uncorrected) to a L1SS service(if one exists).

This patch includes the following

1) Added code that submits ECC error reports via the Interrupt context
directly to a L1SS service in linux OS.

2) Added support for enabling/disabling the error reports via L1SS's
registration/deregistration API. Nvgpu simply invokes an empty function
until the registration is successful.

3) Added Spinlock to correctly handle concurrency for accessing the
correct Ops for submitting requests.

4) Adds error reporting for a subset of interrupts that can be verified
via external ECC injection logic. A subsequent patch will add the
API for rest of the interrupts.

5) In case of critical(uncorrected errors), change nvgpu's state to
quiesce state.

Jira L4T-1187
Bug 200700400

Change-Id: Id31f70531fba355e94e72c4f9762593e7667a11c
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2530411
Tested-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit

1 files changed, 14 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c
index 5e586ec2..336258a7 100644
--- a/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/pmu_gv11b.c
@@ -1,7 +1,7 @@
 /*
  * GV11B PMU
  *
- * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2021, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -29,6 +29,7 @@
 #include <nvgpu/io.h>
 #include <nvgpu/utils.h>
 #include <nvgpu/gk20a.h>
+#include <nvgpu/nvgpu_err.h>
 
 #include "gk20a/pmu_gk20a.h"
 #include "gp10b/pmu_gp10b.h"
@@ -354,10 +355,18 @@ void gv11b_pmu_handle_ext_irq(struct gk20a *g, u32 intr0)
                                 "pmu ecc interrupt intr1: 0x%x", intr1);
 
                         if (ecc_status & pwr_pmu_falcon_ecc_status_corrected_err_imem_m()) {
+                                nvgpu_report_ecc_err(g, NVGPU_ERR_MODULE_PMU, 0,
+                                        GPU_PMU_FALCON_IMEM_ECC_CORRECTED,
+                                        ecc_addr,
+                                        g->ecc.pmu.pmu_ecc_corrected_err_count[0].counter);
                                 nvgpu_log(g, gpu_dbg_intr,
                                         "imem ecc error corrected");
                         }
                         if (ecc_status & pwr_pmu_falcon_ecc_status_uncorrected_err_imem_m()) {
+                                nvgpu_report_ecc_err(g, NVGPU_ERR_MODULE_PMU, 0,
+                                        GPU_PMU_FALCON_IMEM_ECC_UNCORRECTED,
+                                        ecc_addr,
+                                        g->ecc.pmu.pmu_ecc_uncorrected_err_count[0].counter);
                                 nvgpu_log(g, gpu_dbg_intr,
                                         "imem ecc error uncorrected");
                         }
@@ -366,6 +375,10 @@ void gv11b_pmu_handle_ext_irq(struct gk20a *g, u32 intr0)
                                         "dmem ecc error corrected");
                         }
                         if (ecc_status & pwr_pmu_falcon_ecc_status_uncorrected_err_dmem_m()) {
+                                nvgpu_report_ecc_err(g, NVGPU_ERR_MODULE_PMU, 0,
+                                        GPU_PMU_FALCON_DMEM_ECC_UNCORRECTED,
+                                        ecc_addr,
+                                        g->ecc.pmu.pmu_ecc_uncorrected_err_count[0].counter);
                                 nvgpu_log(g, gpu_dbg_intr,
                                         "dmem ecc error uncorrected");
                         }