gpu: nvgpu: gv11b: skip clk gating prog for pre-si

For pre-silicon platforms, clock gating
should be skipped as it is not supported.
Added new flags "can_"x"lcg" to check platform
capability before programming SLCG,BLCG and ELCG.

Bug 200314250

Change-Id: Iec7564b00b988cdd50a02f3130662727839c5047
Signed-off-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1566251
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 7 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/platform_gv11b_tegra.c b/drivers/gpu/nvgpu/gv11b/platform_gv11b_tegra.c
index c29d4a23..d2c690f4 100644
--- a/drivers/gpu/nvgpu/gv11b/platform_gv11b_tegra.c
+++ b/drivers/gpu/nvgpu/gv11b/platform_gv11b_tegra.c
@@ -133,6 +133,13 @@ struct gk20a_platform t19x_gpu_tegra_platform = {
         .probe = gv11b_tegra_probe,
         .remove = gv11b_tegra_remove,
 
+        .enable_slcg            = false,
+        .enable_blcg            = false,
+        .enable_elcg            = false,
+        .can_slcg               = false,
+        .can_blcg               = false,
+        .can_elcg               = false,
+
         /* power management callbacks */
         .suspend = gv11b_tegra_suspend,
         .railgate = gv11b_tegra_railgate,