summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gv11b/mm_gv11b.c
diff options
context:
space:
mode:
authorTerje Bergstrom <tbergstrom@nvidia.com>2018-07-03 17:00:40 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-07-11 04:43:26 -0400
commita801c897df1e5e7ac498e1531ce4bbdabdca1c3d (patch)
treec461329d88878803636a268844a7a05acc2ae1d5 /drivers/gpu/nvgpu/gv11b/mm_gv11b.c
parent572fba2c52a6d63dbc785b48ad845e55f0b7eac0 (diff)
gpu: nvgpu: Simplify FB hub intr enable
Hard code flags for enabling and disabling FB hub interrupts. JIRA NVGPU-714 Change-Id: I806ef443cb9e27e221d407d633ca91d8fb40d075 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1769853 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/mm_gv11b.c')
-rw-r--r--drivers/gpu/nvgpu/gv11b/mm_gv11b.c23
1 files changed, 5 insertions, 18 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/mm_gv11b.c b/drivers/gpu/nvgpu/gv11b/mm_gv11b.c
index 5dd43c34..394ff0ed 100644
--- a/drivers/gpu/nvgpu/gv11b/mm_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/mm_gv11b.c
@@ -77,11 +77,7 @@ void gv11b_mm_fault_info_mem_destroy(struct gk20a *g)
77 77
78 nvgpu_mutex_acquire(&g->mm.hub_isr_mutex); 78 nvgpu_mutex_acquire(&g->mm.hub_isr_mutex);
79 79
80 g->ops.fb.disable_hub_intr(g, STALL_REG_INDEX, HUB_INTR_TYPE_OTHER | 80 g->ops.fb.disable_hub_intr(g);
81 HUB_INTR_TYPE_NONREPLAY | HUB_INTR_TYPE_REPLAY);
82
83 g->mm.hub_intr_types &= (~(HUB_INTR_TYPE_NONREPLAY |
84 HUB_INTR_TYPE_REPLAY));
85 81
86 if ((gv11b_fb_is_fault_buf_enabled(g, NONREPLAY_REG_INDEX))) { 82 if ((gv11b_fb_is_fault_buf_enabled(g, NONREPLAY_REG_INDEX))) {
87 gv11b_fb_fault_buf_set_state_hw(g, NONREPLAY_REG_INDEX, 83 gv11b_fb_fault_buf_set_state_hw(g, NONREPLAY_REG_INDEX,
@@ -105,15 +101,12 @@ void gv11b_mm_fault_info_mem_destroy(struct gk20a *g)
105 nvgpu_mutex_destroy(&g->mm.hub_isr_mutex); 101 nvgpu_mutex_destroy(&g->mm.hub_isr_mutex);
106} 102}
107 103
108static int gv11b_mm_mmu_fault_info_buf_init(struct gk20a *g, 104static int gv11b_mm_mmu_fault_info_buf_init(struct gk20a *g)
109 u32 *hub_intr_types)
110{ 105{
111 *hub_intr_types |= HUB_INTR_TYPE_OTHER;
112 return 0; 106 return 0;
113} 107}
114 108
115static void gv11b_mm_mmu_hw_fault_buf_init(struct gk20a *g, 109static void gv11b_mm_mmu_hw_fault_buf_init(struct gk20a *g)
116 u32 *hub_intr_types)
117{ 110{
118 struct vm_gk20a *vm = g->mm.bar2.vm; 111 struct vm_gk20a *vm = g->mm.bar2.vm;
119 int err = 0; 112 int err = 0;
@@ -136,8 +129,6 @@ static void gv11b_mm_mmu_hw_fault_buf_init(struct gk20a *g,
136 } 129 }
137 } 130 }
138 131
139 *hub_intr_types |= HUB_INTR_TYPE_NONREPLAY;
140
141 if (!nvgpu_mem_is_valid( 132 if (!nvgpu_mem_is_valid(
142 &g->mm.hw_fault_buf[FAULT_TYPE_REPLAY])) { 133 &g->mm.hw_fault_buf[FAULT_TYPE_REPLAY])) {
143 err = nvgpu_dma_alloc_map_sys(vm, fb_size, 134 err = nvgpu_dma_alloc_map_sys(vm, fb_size,
@@ -149,8 +140,6 @@ static void gv11b_mm_mmu_hw_fault_buf_init(struct gk20a *g,
149 return; 140 return;
150 } 141 }
151 } 142 }
152
153 *hub_intr_types |= HUB_INTR_TYPE_REPLAY;
154} 143}
155 144
156static void gv11b_mm_mmu_fault_setup_hw(struct gk20a *g) 145static void gv11b_mm_mmu_fault_setup_hw(struct gk20a *g)
@@ -170,12 +159,10 @@ static int gv11b_mm_mmu_fault_setup_sw(struct gk20a *g)
170 159
171 nvgpu_mutex_init(&g->mm.hub_isr_mutex); 160 nvgpu_mutex_init(&g->mm.hub_isr_mutex);
172 161
173 g->mm.hub_intr_types = HUB_INTR_TYPE_ECC_UNCORRECTED; 162 err = gv11b_mm_mmu_fault_info_buf_init(g);
174
175 err = gv11b_mm_mmu_fault_info_buf_init(g, &g->mm.hub_intr_types);
176 163
177 if (!err) 164 if (!err)
178 gv11b_mm_mmu_hw_fault_buf_init(g, &g->mm.hub_intr_types); 165 gv11b_mm_mmu_hw_fault_buf_init(g);
179 166
180 return err; 167 return err;
181} 168}