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authorseshendra Gadagottu <sgadagottu@nvidia.com>2018-06-14 15:41:03 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-06-25 13:54:56 -0400
commita012527dbde6308bc158d17cace96d2a2e9fdcfd (patch)
tree51004fc8133c4599829effe501b18dba3a92d910 /drivers/gpu/nvgpu/gv11b/mm_gv11b.c
parentcd6e821cf66837a2c3479e928414007064b9c496 (diff)
gpu: nvgpu: gv11b: fix fb flush issue
membar.sys does synchronization with the whole system (GPU and CPU), membar.gl does synchronization within the GPU. In gv11b, fb flush is generating membar.gl instead of membar.sys, which is an issue. To fix this issue. following WAR is used: 1. Use bar1 engine id and bind it to a particular pdb, 2. Then instead of a fb_flush, issue a tlb invalidate of the bar1 pdb. Now allocation of vm for bar1 instance block and bar1 binding is done without check for bar1 support. Only bar1 register mapping is done based on bar1 support enabled. Bug 2112790 Change-Id: I76f43f1178a68f10823d48bc9da55d2bd686dd52 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1750257 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/mm_gv11b.c')
-rw-r--r--drivers/gpu/nvgpu/gv11b/mm_gv11b.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/mm_gv11b.c b/drivers/gpu/nvgpu/gv11b/mm_gv11b.c
index e1d90829..0cf08d4a 100644
--- a/drivers/gpu/nvgpu/gv11b/mm_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/mm_gv11b.c
@@ -249,7 +249,11 @@ void gv11b_mm_l2_flush(struct gk20a *g, bool invalidate)
249 249
250 g->ops.mm.fb_flush(g); 250 g->ops.mm.fb_flush(g);
251 gk20a_mm_l2_flush(g, invalidate); 251 gk20a_mm_l2_flush(g, invalidate);
252 g->ops.mm.fb_flush(g); 252 if (g->ops.bus.bar1_bind)
253 g->ops.fb.tlb_invalidate(g,
254 g->mm.bar1.vm->pdb.mem);
255 else
256 g->ops.mm.fb_flush(g);
253} 257}
254 258
255/* 259/*