gpu: nvgpu: gv11b: enable correct interrupts

Enable stall and non-stall interupts for gv11b.
Support for replayable interrupts will be added later.
Hub interrupts are not enabled and they will be enabled
after non-replayabale fault handling is in place.

JIRA GV11B-11

Change-Id: I99cc470dae9d02f92e9fb3cb49186dabfed78875
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1239337
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 25 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/mc_gv11b.c b/drivers/gpu/nvgpu/gv11b/mc_gv11b.c
index bc0aee2e..0111d6b3 100644
--- a/drivers/gpu/nvgpu/gv11b/mc_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/mc_gv11b.c
@@ -20,7 +20,32 @@
 #include "gv11b/mc_gv11b.h"
 #include "hw_mc_gv11b.h"
 
+static void mc_gv11b_intr_enable(struct gk20a *g)
+{
+        u32 eng_intr_mask = gk20a_fifo_engine_interrupt_mask(g);
+
+        gk20a_writel(g, mc_intr_en_clear_r(NVGPU_MC_INTR_STALLING),
+                                0xffffffff);
+        g->ops.mc.intr_mask_restore[NVGPU_MC_INTR_STALLING] =
+                                mc_intr_pfifo_pending_f()
+                                | eng_intr_mask;
+        gk20a_writel(g, mc_intr_en_set_r(NVGPU_MC_INTR_STALLING),
+                        g->ops.mc.intr_mask_restore[NVGPU_MC_INTR_STALLING]);
+
+        gk20a_writel(g, mc_intr_en_clear_r(NVGPU_MC_INTR_NONSTALLING),
+                                0xffffffff);
+        g->ops.mc.intr_mask_restore[NVGPU_MC_INTR_NONSTALLING] =
+                                mc_intr_pfifo_pending_f()
+                             | mc_intr_priv_ring_pending_f()
+                             | mc_intr_ltc_pending_f()
+                             | mc_intr_pbus_pending_f()
+                             | eng_intr_mask;
+        gk20a_writel(g, mc_intr_en_set_r(NVGPU_MC_INTR_NONSTALLING),
+                        g->ops.mc.intr_mask_restore[NVGPU_MC_INTR_NONSTALLING]);
+}
+
 void gv11b_init_mc(struct gpu_ops *gops)
 {
         gp10b_init_mc(gops);
+        gops->mc.intr_enable = mc_gv11b_intr_enable;
 }