diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2018-07-03 17:00:40 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-07-11 04:43:26 -0400 |
commit | a801c897df1e5e7ac498e1531ce4bbdabdca1c3d (patch) | |
tree | c461329d88878803636a268844a7a05acc2ae1d5 /drivers/gpu/nvgpu/gv11b/mc_gv11b.c | |
parent | 572fba2c52a6d63dbc785b48ad845e55f0b7eac0 (diff) |
gpu: nvgpu: Simplify FB hub intr enable
Hard code flags for enabling and disabling FB hub interrupts.
JIRA NVGPU-714
Change-Id: I806ef443cb9e27e221d407d633ca91d8fb40d075
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1769853
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/mc_gv11b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/mc_gv11b.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/mc_gv11b.c b/drivers/gpu/nvgpu/gv11b/mc_gv11b.c index 31600828..b7a3ce62 100644 --- a/drivers/gpu/nvgpu/gv11b/mc_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/mc_gv11b.c | |||
@@ -41,7 +41,6 @@ void mc_gv11b_intr_enable(struct gk20a *g) | |||
41 | 0xffffffffU); | 41 | 0xffffffffU); |
42 | gk20a_writel(g, mc_intr_en_clear_r(NVGPU_MC_INTR_NONSTALLING), | 42 | gk20a_writel(g, mc_intr_en_clear_r(NVGPU_MC_INTR_NONSTALLING), |
43 | 0xffffffffU); | 43 | 0xffffffffU); |
44 | g->ops.fb.disable_hub_intr(g, STALL_REG_INDEX, HUB_INTR_TYPE_ALL); | ||
45 | 44 | ||
46 | g->mc_intr_mask_restore[NVGPU_MC_INTR_STALLING] = | 45 | g->mc_intr_mask_restore[NVGPU_MC_INTR_STALLING] = |
47 | mc_intr_pfifo_pending_f() | | 46 | mc_intr_pfifo_pending_f() | |
@@ -55,9 +54,6 @@ void mc_gv11b_intr_enable(struct gk20a *g) | |||
55 | mc_intr_pfifo_pending_f() | 54 | mc_intr_pfifo_pending_f() |
56 | | eng_intr_mask; | 55 | | eng_intr_mask; |
57 | 56 | ||
58 | /* TODO: Enable PRI faults for HUB ECC err intr */ | ||
59 | g->ops.fb.enable_hub_intr(g, STALL_REG_INDEX, g->mm.hub_intr_types); | ||
60 | |||
61 | gk20a_writel(g, mc_intr_en_set_r(NVGPU_MC_INTR_STALLING), | 57 | gk20a_writel(g, mc_intr_en_set_r(NVGPU_MC_INTR_STALLING), |
62 | g->mc_intr_mask_restore[NVGPU_MC_INTR_STALLING]); | 58 | g->mc_intr_mask_restore[NVGPU_MC_INTR_STALLING]); |
63 | 59 | ||