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authorSunny He <suhe@nvidia.com>2017-06-27 17:30:57 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-07-13 03:09:09 -0400
commit2f0838af1b8a73dc976837dfa568281d47628a37 (patch)
tree06ff28cb5de7917dc9f1b72274a91e0f9ffb476c /drivers/gpu/nvgpu/gv11b/mc_gv11b.c
parent4e290320fdfe56cc2fe849720d6a01b44cace1a7 (diff)
gpu: nvgpu: gv11b: Move gops.mc's non-fp members
Move non-function pointer members out of the mc substruct of gpu_ops. Ideally gpu_ops will have only function ponters, better matching its intended purpose and improving readability. gops.mc.intr_mask_restore is now mc_intr_mask_restore Jira NVGPU-74 Change-Id: I789087704fb5e6338f6010f18457948d0ee6c630 Signed-off-by: Sunny He <suhe@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1509604 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/mc_gv11b.c')
-rw-r--r--drivers/gpu/nvgpu/gv11b/mc_gv11b.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/mc_gv11b.c b/drivers/gpu/nvgpu/gv11b/mc_gv11b.c
index 81e6381f..59263e54 100644
--- a/drivers/gpu/nvgpu/gv11b/mc_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/mc_gv11b.c
@@ -34,7 +34,7 @@ void mc_gv11b_intr_enable(struct gk20a *g)
34 0xffffffff); 34 0xffffffff);
35 gv11b_fb_disable_hub_intr(g, STALL_REG_INDEX, HUB_INTR_TYPE_ALL); 35 gv11b_fb_disable_hub_intr(g, STALL_REG_INDEX, HUB_INTR_TYPE_ALL);
36 36
37 g->ops.mc.intr_mask_restore[NVGPU_MC_INTR_STALLING] = 37 g->mc_intr_mask_restore[NVGPU_MC_INTR_STALLING] =
38 mc_intr_pfifo_pending_f() | 38 mc_intr_pfifo_pending_f() |
39 mc_intr_hub_pending_f() | 39 mc_intr_hub_pending_f() |
40 mc_intr_priv_ring_pending_f() | 40 mc_intr_priv_ring_pending_f() |
@@ -42,7 +42,7 @@ void mc_gv11b_intr_enable(struct gk20a *g)
42 mc_intr_ltc_pending_f() | 42 mc_intr_ltc_pending_f() |
43 eng_intr_mask; 43 eng_intr_mask;
44 44
45 g->ops.mc.intr_mask_restore[NVGPU_MC_INTR_NONSTALLING] = 45 g->mc_intr_mask_restore[NVGPU_MC_INTR_NONSTALLING] =
46 mc_intr_pfifo_pending_f() 46 mc_intr_pfifo_pending_f()
47 | eng_intr_mask; 47 | eng_intr_mask;
48 48
@@ -50,10 +50,10 @@ void mc_gv11b_intr_enable(struct gk20a *g)
50 gv11b_fb_enable_hub_intr(g, STALL_REG_INDEX, g->mm.hub_intr_types); 50 gv11b_fb_enable_hub_intr(g, STALL_REG_INDEX, g->mm.hub_intr_types);
51 51
52 gk20a_writel(g, mc_intr_en_set_r(NVGPU_MC_INTR_STALLING), 52 gk20a_writel(g, mc_intr_en_set_r(NVGPU_MC_INTR_STALLING),
53 g->ops.mc.intr_mask_restore[NVGPU_MC_INTR_STALLING]); 53 g->mc_intr_mask_restore[NVGPU_MC_INTR_STALLING]);
54 54
55 gk20a_writel(g, mc_intr_en_set_r(NVGPU_MC_INTR_NONSTALLING), 55 gk20a_writel(g, mc_intr_en_set_r(NVGPU_MC_INTR_NONSTALLING),
56 g->ops.mc.intr_mask_restore[NVGPU_MC_INTR_NONSTALLING]); 56 g->mc_intr_mask_restore[NVGPU_MC_INTR_NONSTALLING]);
57 57
58} 58}
59 59