diff options
author | Vaibhav Kachore <vkachore@nvidia.com> | 2018-02-22 06:15:30 -0500 |
---|---|---|
committer | Tejal Kudav <tkudav@nvidia.com> | 2018-06-14 09:44:08 -0400 |
commit | ca3215c6b23c7d855ced899d8090aaa8ce9a9fa3 (patch) | |
tree | 710114451d4838f82a9e9998db52b81cf76d68c9 /drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |
parent | 97d697a8481ca0c348102f04165903e3205302ed (diff) |
gpu: nvgpu: add support for FECS VA
- On t186, ucode expects physical address to be
programmed for FECS trace buffer.
- On t194, ucode expects GPU VA to be programmed
for FECS trace buffer. This patch adds extra
support to handle this change for linux native.
- Increase the size of FECS trace buffer (as few
entries were getting dropped due to overflow of
FECS trace buffer.)
- This moves FECS trace buffer handling in global
context buffer.
- This adds extra check for updation of mailbox1
register. (Bug 200417403)
EVLR-2077
Change-Id: I7c3324ce9341976a1375e0afe6c53c424a053723
Signed-off-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1536028
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/hal_gv11b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 27 |
1 files changed, 14 insertions, 13 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index f9ac1f2a..9d7dca95 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -586,20 +586,20 @@ static const struct gpu_ops gv11b_ops = { | |||
586 | }, | 586 | }, |
587 | #ifdef CONFIG_GK20A_CTXSW_TRACE | 587 | #ifdef CONFIG_GK20A_CTXSW_TRACE |
588 | .fecs_trace = { | 588 | .fecs_trace = { |
589 | .alloc_user_buffer = NULL, | 589 | .alloc_user_buffer = gk20a_ctxsw_dev_ring_alloc, |
590 | .free_user_buffer = NULL, | 590 | .free_user_buffer = gk20a_ctxsw_dev_ring_free, |
591 | .mmap_user_buffer = NULL, | 591 | .mmap_user_buffer = gk20a_ctxsw_dev_mmap_buffer, |
592 | .init = NULL, | 592 | .init = gk20a_fecs_trace_init, |
593 | .deinit = NULL, | 593 | .deinit = gk20a_fecs_trace_deinit, |
594 | .enable = NULL, | 594 | .enable = gk20a_fecs_trace_enable, |
595 | .disable = NULL, | 595 | .disable = gk20a_fecs_trace_disable, |
596 | .is_enabled = NULL, | 596 | .is_enabled = gk20a_fecs_trace_is_enabled, |
597 | .reset = NULL, | 597 | .reset = gk20a_fecs_trace_reset, |
598 | .flush = NULL, | 598 | .flush = NULL, |
599 | .poll = NULL, | 599 | .poll = gk20a_fecs_trace_poll, |
600 | .bind_channel = NULL, | 600 | .bind_channel = gk20a_fecs_trace_bind_channel, |
601 | .unbind_channel = NULL, | 601 | .unbind_channel = gk20a_fecs_trace_unbind_channel, |
602 | .max_entries = NULL, | 602 | .max_entries = gk20a_gr_max_entries, |
603 | }, | 603 | }, |
604 | #endif /* CONFIG_GK20A_CTXSW_TRACE */ | 604 | #endif /* CONFIG_GK20A_CTXSW_TRACE */ |
605 | .mm = { | 605 | .mm = { |
@@ -843,6 +843,7 @@ int gv11b_init_hal(struct gk20a *g) | |||
843 | } | 843 | } |
844 | 844 | ||
845 | __nvgpu_set_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE, false); | 845 | __nvgpu_set_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE, false); |
846 | __nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, true); | ||
846 | g->bootstrap_owner = LSF_BOOTSTRAP_OWNER_DEFAULT; | 847 | g->bootstrap_owner = LSF_BOOTSTRAP_OWNER_DEFAULT; |
847 | 848 | ||
848 | __nvgpu_set_enabled(g, NVGPU_SUPPORT_MULTIPLE_WPR, false); | 849 | __nvgpu_set_enabled(g, NVGPU_SUPPORT_MULTIPLE_WPR, false); |