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author | Terje Bergstrom <tbergstrom@nvidia.com> | 2018-08-09 12:20:33 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-08-14 18:33:20 -0400 |
commit | 91390d857f6302f9c2923ec4188ea7e24ee537a2 (patch) | |
tree | e0884e79ea748d2c0bd384c29f805125a7b88fec /drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |
parent | 02f9c99e4b4a452ded20978c5ee1e27b775b9224 (diff) |
gpu: nvgpu: Move therm HAL to common
Move implementation of therm HAL to common/therm. ELCG and BLCG
code was embedded in gr HAL, so moved that code to therm.
Bump gk20a code to gm20b.
JIRA NVGPU-955
Change-Id: I9b03e52f2832d3a1d89071a577e8ce106aaf603b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1795989
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/hal_gv11b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 05763cce..111a1ea2 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -33,6 +33,9 @@ | |||
33 | #include "common/fb/fb_gm20b.h" | 33 | #include "common/fb/fb_gm20b.h" |
34 | #include "common/fb/fb_gp10b.h" | 34 | #include "common/fb/fb_gp10b.h" |
35 | #include "common/fb/fb_gv11b.h" | 35 | #include "common/fb/fb_gv11b.h" |
36 | #include "common/therm/therm_gm20b.h" | ||
37 | #include "common/therm/therm_gp10b.h" | ||
38 | #include "common/therm/therm_gv11b.h" | ||
36 | 39 | ||
37 | #include "gk20a/gk20a.h" | 40 | #include "gk20a/gk20a.h" |
38 | #include "gk20a/fifo_gk20a.h" | 41 | #include "gk20a/fifo_gk20a.h" |
@@ -54,7 +57,6 @@ | |||
54 | #include "gm20b/pmu_gm20b.h" | 57 | #include "gm20b/pmu_gm20b.h" |
55 | 58 | ||
56 | #include "gp10b/ltc_gp10b.h" | 59 | #include "gp10b/ltc_gp10b.h" |
57 | #include "gp10b/therm_gp10b.h" | ||
58 | #include "gp10b/mc_gp10b.h" | 60 | #include "gp10b/mc_gp10b.h" |
59 | #include "gp10b/ce_gp10b.h" | 61 | #include "gp10b/ce_gp10b.h" |
60 | #include "gp10b/fifo_gp10b.h" | 62 | #include "gp10b/fifo_gp10b.h" |
@@ -84,7 +86,6 @@ | |||
84 | #include "fifo_gv11b.h" | 86 | #include "fifo_gv11b.h" |
85 | #include "regops_gv11b.h" | 87 | #include "regops_gv11b.h" |
86 | #include "subctx_gv11b.h" | 88 | #include "subctx_gv11b.h" |
87 | #include "therm_gv11b.h" | ||
88 | #include "ecc_gv11b.h" | 89 | #include "ecc_gv11b.h" |
89 | 90 | ||
90 | #include <nvgpu/ptimer.h> | 91 | #include <nvgpu/ptimer.h> |
@@ -341,7 +342,6 @@ static const struct gpu_ops gv11b_ops = { | |||
341 | .commit_inst = gr_gv11b_commit_inst, | 342 | .commit_inst = gr_gv11b_commit_inst, |
342 | .write_zcull_ptr = gr_gv11b_write_zcull_ptr, | 343 | .write_zcull_ptr = gr_gv11b_write_zcull_ptr, |
343 | .write_pm_ptr = gr_gv11b_write_pm_ptr, | 344 | .write_pm_ptr = gr_gv11b_write_pm_ptr, |
344 | .init_elcg_mode = gr_gv11b_init_elcg_mode, | ||
345 | .load_tpc_mask = gr_gv11b_load_tpc_mask, | 345 | .load_tpc_mask = gr_gv11b_load_tpc_mask, |
346 | .inval_icache = gr_gk20a_inval_icache, | 346 | .inval_icache = gr_gk20a_inval_icache, |
347 | .trigger_suspend = gv11b_gr_sm_trigger_suspend, | 347 | .trigger_suspend = gv11b_gr_sm_trigger_suspend, |
@@ -664,6 +664,8 @@ static const struct gpu_ops gv11b_ops = { | |||
664 | }, | 664 | }, |
665 | .therm = { | 665 | .therm = { |
666 | .init_therm_setup_hw = gv11b_init_therm_setup_hw, | 666 | .init_therm_setup_hw = gv11b_init_therm_setup_hw, |
667 | .init_elcg_mode = gv11b_therm_init_elcg_mode, | ||
668 | .init_blcg_mode = gm20b_therm_init_blcg_mode, | ||
667 | .elcg_init_idle_filters = gv11b_elcg_init_idle_filters, | 669 | .elcg_init_idle_filters = gv11b_elcg_init_idle_filters, |
668 | }, | 670 | }, |
669 | .pmu = { | 671 | .pmu = { |