gpu: nvgpu: gv11b: Reorg fecs_trace HAL init

Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the
fecs_trace sub-module of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: I43932a8eac2a9f791e967a8ed736f76350889a51
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1527420
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 22 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
index f5191da7..04712409 100644
--- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
@@ -21,6 +21,8 @@
 
 #include "gk20a/gk20a.h"
 #include "gk20a/fifo_gk20a.h"
+#include "gk20a/ctxsw_trace_gk20a.h"
+#include "gk20a/fecs_trace_gk20a.h"
 #include "gk20a/css_gr_gk20a.h"
 #include "gk20a/mc_gk20a.h"
 #include "gk20a/dbg_gpu_gk20a.h"
@@ -37,12 +39,12 @@
 #include "gp10b/ce_gp10b.h"
 #include "gp10b/priv_ring_gp10b.h"
 #include "gp10b/fifo_gp10b.h"
+#include "gp10b/fecs_trace_gp10b.h"
 
 #include "hal_gv11b.h"
 #include "gr_gv11b.h"
 #include "mc_gv11b.h"
 #include "ltc_gv11b.h"
-#include "fecs_trace_gv11b.h"
 #include "gv11b.h"
 #include "ce_gv11b.h"
 #include "gr_ctx_gv11b.h"
@@ -286,6 +288,24 @@ static const struct gpu_ops gv11b_ops = {
                 .get_netlist_name = gr_gv11b_get_netlist_name,
                 .is_fw_defined = gr_gv11b_is_firmware_defined,
         },
+#ifdef CONFIG_GK20A_CTXSW_TRACE
+        .fecs_trace = {
+                .alloc_user_buffer = gk20a_ctxsw_dev_ring_alloc,
+                .free_user_buffer = gk20a_ctxsw_dev_ring_free,
+                .mmap_user_buffer = gk20a_ctxsw_dev_mmap_buffer,
+                .init = gk20a_fecs_trace_init,
+                .deinit = gk20a_fecs_trace_deinit,
+                .enable = gk20a_fecs_trace_enable,
+                .disable = gk20a_fecs_trace_disable,
+                .is_enabled = gk20a_fecs_trace_is_enabled,
+                .reset = gk20a_fecs_trace_reset,
+                .flush = gp10b_fecs_trace_flush,
+                .poll = gk20a_fecs_trace_poll,
+                .bind_channel = gk20a_fecs_trace_bind_channel,
+                .unbind_channel = gk20a_fecs_trace_unbind_channel,
+                .max_entries = gk20a_gr_max_entries,
+        },
+#endif /* CONFIG_GK20A_CTXSW_TRACE */
         .mc = {
                 .intr_enable = mc_gv11b_intr_enable,
                 .intr_unit_config = mc_gp10b_intr_unit_config,
@@ -354,6 +374,7 @@ int gv11b_init_hal(struct gk20a *g)
         gops->clock_gating = gv11b_ops.clock_gating;
         gops->fifo = gv11b_ops.fifo;
         gops->gr_ctx = gv11b_ops.gr_ctx;
+        gops->fecs_trace = gv11b_ops.fecs_trace;
         gops->mc = gv11b_ops.mc;
         gops->debug = gv11b_ops.debug;
         gops->dbg_session_ops = gv11b_ops.dbg_session_ops;
@@ -375,7 +396,6 @@ int gv11b_init_hal(struct gk20a *g)
         __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, false);
 
         gv11b_init_gr(g);
-        gv11b_init_fecs_trace_ops(gops);
         gv11b_init_fb(gops);
         gv11b_init_mm(gops);
         gv11b_init_pmu_ops(g);