diff options
author | Sunny He <suhe@nvidia.com> | 2017-06-30 18:54:03 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-07-24 02:35:06 -0400 |
commit | 8140c51e6cd212517fc343e6f8f8694bbad98f3b (patch) | |
tree | cf453fdf283484bbbaaf22c5690550bf546c1f22 /drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |
parent | d9f906c1e0f06f54e545727817d227a0bac46a0a (diff) |
gpu: nvgpu: gv11b: Reorg fifo HAL initialization
Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the fifo
sub-module of the gpu_ops struct.
Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.
Jira NVGPU-74
Change-Id: I7c81edfa785a4ecafef41aae7b82d6b1707d294e
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1522554
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/hal_gv11b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 76 |
1 files changed, 74 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 8dc9900a..b6c17c7d 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/tegra_gpu_t19x.h> | 20 | #include <linux/tegra_gpu_t19x.h> |
21 | 21 | ||
22 | #include "gk20a/gk20a.h" | 22 | #include "gk20a/gk20a.h" |
23 | #include "gk20a/fifo_gk20a.h" | ||
23 | #include "gk20a/css_gr_gk20a.h" | 24 | #include "gk20a/css_gr_gk20a.h" |
24 | #include "gk20a/mc_gk20a.h" | 25 | #include "gk20a/mc_gk20a.h" |
25 | #include "gk20a/dbg_gpu_gk20a.h" | 26 | #include "gk20a/dbg_gpu_gk20a.h" |
@@ -29,10 +30,12 @@ | |||
29 | 30 | ||
30 | #include "gm20b/ltc_gm20b.h" | 31 | #include "gm20b/ltc_gm20b.h" |
31 | #include "gm20b/gr_gm20b.h" | 32 | #include "gm20b/gr_gm20b.h" |
33 | #include "gm20b/fifo_gm20b.h" | ||
32 | 34 | ||
33 | #include "gp10b/ltc_gp10b.h" | 35 | #include "gp10b/ltc_gp10b.h" |
34 | #include "gp10b/mc_gp10b.h" | 36 | #include "gp10b/mc_gp10b.h" |
35 | #include "gp10b/priv_ring_gp10b.h" | 37 | #include "gp10b/priv_ring_gp10b.h" |
38 | #include "gp10b/fifo_gp10b.h" | ||
36 | 39 | ||
37 | #include "hal_gv11b.h" | 40 | #include "hal_gv11b.h" |
38 | #include "gr_gv11b.h" | 41 | #include "gr_gv11b.h" |
@@ -49,10 +52,14 @@ | |||
49 | #include "fifo_gv11b.h" | 52 | #include "fifo_gv11b.h" |
50 | #include "gv11b_gating_reglist.h" | 53 | #include "gv11b_gating_reglist.h" |
51 | #include "regops_gv11b.h" | 54 | #include "regops_gv11b.h" |
55 | #include "subctx_gv11b.h" | ||
52 | 56 | ||
53 | #include <nvgpu/debug.h> | 57 | #include <nvgpu/debug.h> |
54 | 58 | ||
55 | #include <nvgpu/hw/gv11b/hw_proj_gv11b.h> | 59 | #include <nvgpu/hw/gv11b/hw_proj_gv11b.h> |
60 | #include <nvgpu/hw/gv11b/hw_fifo_gv11b.h> | ||
61 | #include <nvgpu/hw/gv11b/hw_ram_gv11b.h> | ||
62 | #include <nvgpu/hw/gv11b/hw_top_gv11b.h> | ||
56 | 63 | ||
57 | static int gv11b_get_litter_value(struct gk20a *g, int value) | 64 | static int gv11b_get_litter_value(struct gk20a *g, int value) |
58 | { | 65 | { |
@@ -202,6 +209,72 @@ static const struct gpu_ops gv11b_ops = { | |||
202 | .pg_gr_load_gating_prod = | 209 | .pg_gr_load_gating_prod = |
203 | gr_gv11b_pg_gr_load_gating_prod, | 210 | gr_gv11b_pg_gr_load_gating_prod, |
204 | }, | 211 | }, |
212 | .fifo = { | ||
213 | .init_fifo_setup_hw = gv11b_init_fifo_setup_hw, | ||
214 | .bind_channel = channel_gm20b_bind, | ||
215 | .unbind_channel = channel_gv11b_unbind, | ||
216 | .disable_channel = gk20a_fifo_disable_channel, | ||
217 | .enable_channel = gk20a_fifo_enable_channel, | ||
218 | .alloc_inst = gk20a_fifo_alloc_inst, | ||
219 | .free_inst = gk20a_fifo_free_inst, | ||
220 | .setup_ramfc = channel_gv11b_setup_ramfc, | ||
221 | .channel_set_priority = gk20a_fifo_set_priority, | ||
222 | .channel_set_timeslice = gk20a_fifo_set_timeslice, | ||
223 | .default_timeslice_us = gk20a_fifo_default_timeslice_us, | ||
224 | .setup_userd = gk20a_fifo_setup_userd, | ||
225 | .userd_gp_get = gv11b_userd_gp_get, | ||
226 | .userd_gp_put = gv11b_userd_gp_put, | ||
227 | .userd_pb_get = gv11b_userd_pb_get, | ||
228 | .pbdma_acquire_val = gk20a_fifo_pbdma_acquire_val, | ||
229 | .preempt_channel = gv11b_fifo_preempt_channel, | ||
230 | .preempt_tsg = gv11b_fifo_preempt_tsg, | ||
231 | .update_runlist = gk20a_fifo_update_runlist, | ||
232 | .trigger_mmu_fault = NULL, | ||
233 | .get_mmu_fault_info = NULL, | ||
234 | .wait_engine_idle = gk20a_fifo_wait_engine_idle, | ||
235 | .get_num_fifos = gv11b_fifo_get_num_fifos, | ||
236 | .get_pbdma_signature = gp10b_fifo_get_pbdma_signature, | ||
237 | .set_runlist_interleave = gk20a_fifo_set_runlist_interleave, | ||
238 | .tsg_set_timeslice = gk20a_fifo_tsg_set_timeslice, | ||
239 | .force_reset_ch = gk20a_fifo_force_reset_ch, | ||
240 | .engine_enum_from_type = gp10b_fifo_engine_enum_from_type, | ||
241 | .device_info_data_parse = gp10b_device_info_data_parse, | ||
242 | .eng_runlist_base_size = fifo_eng_runlist_base__size_1_v, | ||
243 | .init_engine_info = gk20a_fifo_init_engine_info, | ||
244 | .runlist_entry_size = ram_rl_entry_size_v, | ||
245 | .get_tsg_runlist_entry = gv11b_get_tsg_runlist_entry, | ||
246 | .get_ch_runlist_entry = gv11b_get_ch_runlist_entry, | ||
247 | .is_fault_engine_subid_gpc = gv11b_is_fault_engine_subid_gpc, | ||
248 | .dump_pbdma_status = gk20a_dump_pbdma_status, | ||
249 | .dump_eng_status = gv11b_dump_eng_status, | ||
250 | .dump_channel_status_ramfc = gv11b_dump_channel_status_ramfc, | ||
251 | .intr_0_error_mask = gv11b_fifo_intr_0_error_mask, | ||
252 | .is_preempt_pending = gv11b_fifo_is_preempt_pending, | ||
253 | .init_pbdma_intr_descs = gv11b_fifo_init_pbdma_intr_descs, | ||
254 | .reset_enable_hw = gv11b_init_fifo_reset_enable_hw, | ||
255 | .teardown_ch_tsg = gv11b_fifo_teardown_ch_tsg, | ||
256 | .handle_sched_error = gv11b_fifo_handle_sched_error, | ||
257 | .handle_pbdma_intr_0 = gv11b_fifo_handle_pbdma_intr_0, | ||
258 | .handle_pbdma_intr_1 = gv11b_fifo_handle_pbdma_intr_1, | ||
259 | .init_eng_method_buffers = gv11b_fifo_init_eng_method_buffers, | ||
260 | .deinit_eng_method_buffers = | ||
261 | gv11b_fifo_deinit_eng_method_buffers, | ||
262 | .tsg_bind_channel = gk20a_tsg_bind_channel, | ||
263 | .tsg_unbind_channel = gk20a_tsg_unbind_channel, | ||
264 | #ifdef CONFIG_TEGRA_GK20A_NVHOST | ||
265 | .alloc_syncpt_buf = gv11b_fifo_alloc_syncpt_buf, | ||
266 | .free_syncpt_buf = gv11b_fifo_free_syncpt_buf, | ||
267 | .add_syncpt_wait_cmd = gv11b_fifo_add_syncpt_wait_cmd, | ||
268 | .get_syncpt_wait_cmd_size = gv11b_fifo_get_syncpt_wait_cmd_size, | ||
269 | .add_syncpt_incr_cmd = gv11b_fifo_add_syncpt_incr_cmd, | ||
270 | .get_syncpt_incr_cmd_size = gv11b_fifo_get_syncpt_incr_cmd_size, | ||
271 | #endif | ||
272 | .resetup_ramfc = NULL, | ||
273 | .device_info_fault_id = top_device_info_data_fault_id_enum_v, | ||
274 | .free_channel_ctx_header = gv11b_free_subctx_header, | ||
275 | .preempt_ch_tsg = gv11b_fifo_preempt_ch_tsg, | ||
276 | .handle_ctxsw_timeout = gv11b_fifo_handle_ctxsw_timeout, | ||
277 | }, | ||
205 | .mc = { | 278 | .mc = { |
206 | .intr_enable = mc_gv11b_intr_enable, | 279 | .intr_enable = mc_gv11b_intr_enable, |
207 | .intr_unit_config = mc_gp10b_intr_unit_config, | 280 | .intr_unit_config = mc_gp10b_intr_unit_config, |
@@ -267,6 +340,7 @@ int gv11b_init_hal(struct gk20a *g) | |||
267 | 340 | ||
268 | gops->ltc = gv11b_ops.ltc; | 341 | gops->ltc = gv11b_ops.ltc; |
269 | gops->clock_gating = gv11b_ops.clock_gating; | 342 | gops->clock_gating = gv11b_ops.clock_gating; |
343 | gops->fifo = gv11b_ops.fifo; | ||
270 | gops->mc = gv11b_ops.mc; | 344 | gops->mc = gv11b_ops.mc; |
271 | gops->debug = gv11b_ops.debug; | 345 | gops->debug = gv11b_ops.debug; |
272 | gops->dbg_session_ops = gv11b_ops.dbg_session_ops; | 346 | gops->dbg_session_ops = gv11b_ops.dbg_session_ops; |
@@ -289,14 +363,12 @@ int gv11b_init_hal(struct gk20a *g) | |||
289 | gv11b_init_gr(gops); | 363 | gv11b_init_gr(gops); |
290 | gv11b_init_fecs_trace_ops(gops); | 364 | gv11b_init_fecs_trace_ops(gops); |
291 | gv11b_init_fb(gops); | 365 | gv11b_init_fb(gops); |
292 | gv11b_init_fifo(gops); | ||
293 | gv11b_init_ce(gops); | 366 | gv11b_init_ce(gops); |
294 | gv11b_init_gr_ctx(gops); | 367 | gv11b_init_gr_ctx(gops); |
295 | gv11b_init_mm(gops); | 368 | gv11b_init_mm(gops); |
296 | gv11b_init_pmu_ops(gops); | 369 | gv11b_init_pmu_ops(gops); |
297 | gv11b_init_regops(gops); | 370 | gv11b_init_regops(gops); |
298 | gv11b_init_therm_ops(gops); | 371 | gv11b_init_therm_ops(gops); |
299 | gk20a_init_tsg_ops(gops); | ||
300 | 372 | ||
301 | g->name = "gv11b"; | 373 | g->name = "gv11b"; |
302 | 374 | ||