diff options
author | Sunny He <suhe@nvidia.com> | 2017-08-11 17:41:50 -0400 |
---|---|---|
committer | Shu Zhong <shuz@nvidia.com> | 2017-08-11 17:57:21 -0400 |
commit | 6486d4b8f1c9750f039374db00477e0af167cfbe (patch) | |
tree | b0f19985625faf8757b96b6282b349032f2e51b6 /drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |
parent | a4e095aa37ec5a6c09a8cc6477da9fa49a73cd77 (diff) |
Revert "gpu: nvgpu: gv11b: Reorg fb HAL initialization"
Conflicts with gv100 changes
This reverts commit da8e67f042760d54f3d6b5f84abbd9981d9fcd54.
Change-Id: Ifd1a51debc0e92fc443e6ac0aad1b224821d6585
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1537669
Reviewed-by: Shu Zhong <shuz@nvidia.com>
Tested-by: Shu Zhong <shuz@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/hal_gv11b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 25 |
1 files changed, 1 insertions, 24 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 9f6c67c1..282aa228 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -29,11 +29,9 @@ | |||
29 | #include "gk20a/bus_gk20a.h" | 29 | #include "gk20a/bus_gk20a.h" |
30 | #include "gk20a/flcn_gk20a.h" | 30 | #include "gk20a/flcn_gk20a.h" |
31 | #include "gk20a/regops_gk20a.h" | 31 | #include "gk20a/regops_gk20a.h" |
32 | #include "gk20a/fb_gk20a.h" | ||
33 | 32 | ||
34 | #include "gm20b/ltc_gm20b.h" | 33 | #include "gm20b/ltc_gm20b.h" |
35 | #include "gm20b/gr_gm20b.h" | 34 | #include "gm20b/gr_gm20b.h" |
36 | #include "gm20b/fb_gm20b.h" | ||
37 | #include "gm20b/fifo_gm20b.h" | 35 | #include "gm20b/fifo_gm20b.h" |
38 | 36 | ||
39 | #include "gp10b/ltc_gp10b.h" | 37 | #include "gp10b/ltc_gp10b.h" |
@@ -43,7 +41,6 @@ | |||
43 | #include "gp10b/priv_ring_gp10b.h" | 41 | #include "gp10b/priv_ring_gp10b.h" |
44 | #include "gp10b/fifo_gp10b.h" | 42 | #include "gp10b/fifo_gp10b.h" |
45 | #include "gp10b/fecs_trace_gp10b.h" | 43 | #include "gp10b/fecs_trace_gp10b.h" |
46 | #include "gp10b/fb_gp10b.h" | ||
47 | 44 | ||
48 | #include "hal_gv11b.h" | 45 | #include "hal_gv11b.h" |
49 | #include "gr_gv11b.h" | 46 | #include "gr_gv11b.h" |
@@ -178,23 +175,6 @@ static const struct gpu_ops gv11b_ops = { | |||
178 | .isr_nonstall = gp10b_ce_nonstall_isr, | 175 | .isr_nonstall = gp10b_ce_nonstall_isr, |
179 | .get_num_pce = gv11b_ce_get_num_pce, | 176 | .get_num_pce = gv11b_ce_get_num_pce, |
180 | }, | 177 | }, |
181 | .fb = { | ||
182 | .reset = gv11b_fb_reset, | ||
183 | .init_hw = gk20a_fb_init_hw, | ||
184 | .init_fs_state = gv11b_fb_init_fs_state, | ||
185 | .init_cbc = gv11b_fb_init_cbc, | ||
186 | .set_mmu_page_size = gm20b_fb_set_mmu_page_size, | ||
187 | .set_use_full_comp_tag_line = | ||
188 | gm20b_fb_set_use_full_comp_tag_line, | ||
189 | .compression_page_size = gp10b_fb_compression_page_size, | ||
190 | .compressible_page_size = gp10b_fb_compressible_page_size, | ||
191 | .vpr_info_fetch = gm20b_fb_vpr_info_fetch, | ||
192 | .dump_vpr_wpr_info = gm20b_fb_dump_vpr_wpr_info, | ||
193 | .is_debug_mode_enabled = gm20b_fb_debug_mode_enabled, | ||
194 | .set_debug_mode = gm20b_fb_set_debug_mode, | ||
195 | .tlb_invalidate = gk20a_fb_tlb_invalidate, | ||
196 | .hub_isr = gv11b_fb_hub_isr, | ||
197 | }, | ||
198 | .clock_gating = { | 178 | .clock_gating = { |
199 | .slcg_bus_load_gating_prod = | 179 | .slcg_bus_load_gating_prod = |
200 | gv11b_slcg_bus_load_gating_prod, | 180 | gv11b_slcg_bus_load_gating_prod, |
@@ -425,7 +405,6 @@ int gv11b_init_hal(struct gk20a *g) | |||
425 | 405 | ||
426 | gops->ltc = gv11b_ops.ltc; | 406 | gops->ltc = gv11b_ops.ltc; |
427 | gops->ce2 = gv11b_ops.ce2; | 407 | gops->ce2 = gv11b_ops.ce2; |
428 | gops->fb = gv11b_ops.fb; | ||
429 | gops->clock_gating = gv11b_ops.clock_gating; | 408 | gops->clock_gating = gv11b_ops.clock_gating; |
430 | gops->fifo = gv11b_ops.fifo; | 409 | gops->fifo = gv11b_ops.fifo; |
431 | gops->gr_ctx = gv11b_ops.gr_ctx; | 410 | gops->gr_ctx = gv11b_ops.gr_ctx; |
@@ -453,12 +432,10 @@ int gv11b_init_hal(struct gk20a *g) | |||
453 | __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, false); | 432 | __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, false); |
454 | 433 | ||
455 | gv11b_init_gr(g); | 434 | gv11b_init_gr(g); |
435 | gv11b_init_fb(gops); | ||
456 | gv11b_init_mm(gops); | 436 | gv11b_init_mm(gops); |
457 | gv11b_init_pmu_ops(g); | 437 | gv11b_init_pmu_ops(g); |
458 | 438 | ||
459 | gv11b_init_uncompressed_kind_map(); | ||
460 | gv11b_init_kind_attr(); | ||
461 | |||
462 | g->name = "gv11b"; | 439 | g->name = "gv11b"; |
463 | 440 | ||
464 | c->twod_class = FERMI_TWOD_A; | 441 | c->twod_class = FERMI_TWOD_A; |