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author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2018-09-06 11:14:27 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-24 11:11:49 -0400 |
commit | 5d30a5cda37ca349b4d9cb7e1985c7a0849001b6 (patch) | |
tree | 89a37078480d7cec42d9a8c7bc869aae8bb28279 /drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |
parent | 7465926ccdcdad87c22c788fe04fc11961df53ba (diff) |
gpu: nvgpu: ACR code refactor
-Created struct nvgpu_acr to hold acr module related member
within single struct which are currently spread across multiple structs
like nvgpu_pmu, pmu_ops & gk20a.
-Created struct hs_flcn_bl struct to hold ACR HS bootloader specific members
-Created struct hs_acr to hold ACR ucode specific members like bootloader data
using struct hs_flcn_bl, acr type & falcon info on which ACR ucode need to run.
-Created acr ops under struct nvgpu_acr to perform ACR specific operation,
currently ACR ops were part PMU which caused to have always dependence
on PMU even though ACR was not executing on PMU.
-Added acr_remove_support ops which will be called as part of
gk20a_remove_support() method, earlier acr cleanup was part of
pmu remove_support method.
-Created define for ACR types,
-Ops acr_sw_init() function helps to set ACR properties
statically for chip currently in execution & assign ops to point to
needed functions as per chip.
-Ops acr_sw_init execute at early as nvgpu_init_mm_support calls acr
function to alloc blob space.
-Created ops to fill bootloader descriptor & to patch WPR info to ACR uocde
based on interfaces used to bootstrap ACR ucode.
-Created function gm20b_bootstrap_hs_acr() function which is now common
HAL for all chips to bootstrap ACR, earlier had 3 different function for
gm20b/gp10b, gv11b & for all dgpu based on interface needed.
-Removed duplicate code for falcon engine wherever common falcon code can be used.
-Removed ACR code dependent on PMU & made changes to use from nvgpu_acr.
JIRA NVGPU-1148
Change-Id: I39951d2fc9a0bb7ee6057e0fa06da78045d47590
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1813231
GVS: Gerrit_Virtual_Submit
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/hal_gv11b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 0d9f65bf..18b00ea4 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -823,6 +823,9 @@ static const struct gpu_ops gv11b_ops = { | |||
823 | .read_vin_cal_slope_intercept_fuse = NULL, | 823 | .read_vin_cal_slope_intercept_fuse = NULL, |
824 | .read_vin_cal_gain_offset_fuse = NULL, | 824 | .read_vin_cal_gain_offset_fuse = NULL, |
825 | }, | 825 | }, |
826 | .acr = { | ||
827 | .acr_sw_init = nvgpu_gv11b_acr_sw_init, | ||
828 | }, | ||
826 | .chip_init_gpu_characteristics = gv11b_init_gpu_characteristics, | 829 | .chip_init_gpu_characteristics = gv11b_init_gpu_characteristics, |
827 | .get_litter_value = gv11b_get_litter_value, | 830 | .get_litter_value = gv11b_get_litter_value, |
828 | }; | 831 | }; |
@@ -858,6 +861,7 @@ int gv11b_init_hal(struct gk20a *g) | |||
858 | gops->priv_ring = gv11b_ops.priv_ring; | 861 | gops->priv_ring = gv11b_ops.priv_ring; |
859 | gops->fuse = gv11b_ops.fuse; | 862 | gops->fuse = gv11b_ops.fuse; |
860 | gops->clk_arb = gv11b_ops.clk_arb; | 863 | gops->clk_arb = gv11b_ops.clk_arb; |
864 | gops->acr = gv11b_ops.acr; | ||
861 | 865 | ||
862 | /* Lone functions */ | 866 | /* Lone functions */ |
863 | gops->chip_init_gpu_characteristics = | 867 | gops->chip_init_gpu_characteristics = |
@@ -903,7 +907,6 @@ int gv11b_init_hal(struct gk20a *g) | |||
903 | 907 | ||
904 | __nvgpu_set_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE, false); | 908 | __nvgpu_set_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE, false); |
905 | __nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, true); | 909 | __nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, true); |
906 | g->bootstrap_owner = LSF_BOOTSTRAP_OWNER_DEFAULT; | ||
907 | 910 | ||
908 | __nvgpu_set_enabled(g, NVGPU_SUPPORT_MULTIPLE_WPR, false); | 911 | __nvgpu_set_enabled(g, NVGPU_SUPPORT_MULTIPLE_WPR, false); |
909 | 912 | ||