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authorSunny He <suhe@nvidia.com>2017-06-27 17:05:15 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-07-13 03:09:09 -0400
commit4e290320fdfe56cc2fe849720d6a01b44cace1a7 (patch)
treeba6665b465ba33533f99e141c8e65209bebe42d8 /drivers/gpu/nvgpu/gv11b/hal_gv11b.c
parentaade61eff9962b4671802b0d88523e6ccccde6b0 (diff)
gpu: nvgpu: gv11b: Reorg mc HAL initialization
Reorganize HAL initialization to remove inheritance and construct the gpu_ops struct at compile time. This patch only covers the mc sub-module of the gpu_ops struct. Perform HAL function assignments in hal_gxxxx.c through the population of a chip-specific copy of gpu_ops. Jira NVGPU-74 Change-Id: I1a5abde46bf079c206dfdf9f8ee35df048565c49 Signed-off-by: Sunny He <suhe@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1509603 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/hal_gv11b.c')
-rw-r--r--drivers/gpu/nvgpu/gv11b/hal_gv11b.c22
1 files changed, 20 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
index 0a508ddf..d7f00d2f 100644
--- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c
@@ -21,6 +21,7 @@
21 21
22#include "gk20a/gk20a.h" 22#include "gk20a/gk20a.h"
23#include "gk20a/css_gr_gk20a.h" 23#include "gk20a/css_gr_gk20a.h"
24#include "gk20a/mc_gk20a.h"
24#include "gk20a/dbg_gpu_gk20a.h" 25#include "gk20a/dbg_gpu_gk20a.h"
25#include "gk20a/bus_gk20a.h" 26#include "gk20a/bus_gk20a.h"
26#include "gk20a/flcn_gk20a.h" 27#include "gk20a/flcn_gk20a.h"
@@ -29,6 +30,7 @@
29#include "gm20b/gr_gm20b.h" 30#include "gm20b/gr_gm20b.h"
30 31
31#include "gp10b/ltc_gp10b.h" 32#include "gp10b/ltc_gp10b.h"
33#include "gp10b/mc_gp10b.h"
32#include "gp10b/priv_ring_gp10b.h" 34#include "gp10b/priv_ring_gp10b.h"
33 35
34#include "hal_gv11b.h" 36#include "hal_gv11b.h"
@@ -200,7 +202,23 @@ static const struct gpu_ops gv11b_ops = {
200 .pg_gr_load_gating_prod = 202 .pg_gr_load_gating_prod =
201 gr_gv11b_pg_gr_load_gating_prod, 203 gr_gv11b_pg_gr_load_gating_prod,
202 }, 204 },
203 205 .mc = {
206 .intr_enable = mc_gv11b_intr_enable,
207 .intr_unit_config = mc_gp10b_intr_unit_config,
208 .isr_stall = mc_gp10b_isr_stall,
209 .intr_stall = mc_gp10b_intr_stall,
210 .intr_stall_pause = mc_gp10b_intr_stall_pause,
211 .intr_stall_resume = mc_gp10b_intr_stall_resume,
212 .intr_nonstall = mc_gp10b_intr_nonstall,
213 .intr_nonstall_pause = mc_gp10b_intr_nonstall_pause,
214 .intr_nonstall_resume = mc_gp10b_intr_nonstall_resume,
215 .enable = gk20a_mc_enable,
216 .disable = gk20a_mc_disable,
217 .reset = gk20a_mc_reset,
218 .boot_0 = gk20a_mc_boot_0,
219 .is_intr1_pending = mc_gp10b_is_intr1_pending,
220 .is_intr_hub_pending = gv11b_mc_is_intr_hub_pending,
221 },
204 .falcon = { 222 .falcon = {
205 .falcon_hal_sw_init = gk20a_falcon_hal_sw_init, 223 .falcon_hal_sw_init = gk20a_falcon_hal_sw_init,
206 }, 224 },
@@ -215,6 +233,7 @@ int gv11b_init_hal(struct gk20a *g)
215 233
216 gops->ltc = gv11b_ops.ltc; 234 gops->ltc = gv11b_ops.ltc;
217 gops->clock_gating = gv11b_ops.clock_gating; 235 gops->clock_gating = gv11b_ops.clock_gating;
236 gops->mc = gv11b_ops.mc;
218 gops->falcon = gv11b_ops.falcon; 237 gops->falcon = gv11b_ops.falcon;
219 238
220 /* Lone functions */ 239 /* Lone functions */
@@ -227,7 +246,6 @@ int gv11b_init_hal(struct gk20a *g)
227 gops->securegpccs = 0; 246 gops->securegpccs = 0;
228 247
229 gv11b_init_bus(gops); 248 gv11b_init_bus(gops);
230 gv11b_init_mc(gops);
231 gp10b_init_priv_ring(gops); 249 gp10b_init_priv_ring(gops);
232 gv11b_init_gr(gops); 250 gv11b_init_gr(gops);
233 gv11b_init_fecs_trace_ops(gops); 251 gv11b_init_fecs_trace_ops(gops);