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authorAshish Srivastava <assrivastava@nvidia.com>2018-02-20 06:40:27 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2018-06-26 14:17:17 -0400
commit10c3d4447d4206302f5d51695bf1f193255dd889 (patch)
treed70139a9c5f0a7476bf7c471bda2c62d5317b64f /drivers/gpu/nvgpu/gv11b/gv11b.h
parent2d397e34a5aafb5feed406a13f3db536eadae5bb (diff)
gpu: nvgpu: gv11b: enable RMW for gpu atomics
Separate HAL added in gv11b and gv100 for init_gpc_mmu function. In gv11b HAL, RMW is enabled for gpu atomics as default. In gv100 HAL, GPC atomic capability mode will get set based on the FB MMU capability. If GPU is connected through NVLINK then mmu will be set to RMW mode, else it will be in L2 mode. Bug 200390336 Change-Id: I224934f83d1762ec864ef8da7265dd01d86893a0 Signed-off-by: Ashish Srivastava <assrivastava@nvidia.com> Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1735137 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gv11b/gv11b.h')
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