gpu: nvgpu: add support to get unicast addresses on volta

We have new broadcast registers on Volta, and we need to generate correct
unicast addresses for them so that we can write those registers to context image

Add new GR HAL create_priv_addr_table() to do this conversion
Set gr_gk20a_create_priv_addr_table() for older chips
Set gr_gv11b_create_priv_addr_table() for Volta

gr_gv11b_create_priv_addr_table() will use the broadcast flags and then generate
appriate list of unicast register for each broadcast register

Bug 200398811
Jira NVGPU-556

Change-Id: Id53a9e56106d200fe560ffc93394cc0e976f455f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1690027
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 7 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/gr_pri_gv11b.h b/drivers/gpu/nvgpu/gv11b/gr_pri_gv11b.h
index c71f4c9c..78658bf8 100644
--- a/drivers/gpu/nvgpu/gv11b/gr_pri_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/gr_pri_gv11b.h
@@ -37,6 +37,13 @@
 #define NV_PERF_PMMGPC_GPCS                  0x00278000
 #define NV_PERF_PMMFBP_FBPS                  0x0027C000
 
+#define NV_PERF_PMMGPCTPCA_DOMAIN_START      2
+#define NV_PERF_PMMFBP_LTC_DOMAIN_START      2
+#define NV_PERF_PMMFBP_ROP_DOMAIN_START      6
+#define NV_PERF_PMMGPC_NUM_DOMAINS           7
+#define NV_PERF_PMMFBP_LTC_NUM_DOMAINS       4
+#define NV_PERF_PMMFBP_ROP_NUM_DOMAINS       2
+
 #define PRI_PMMGS_ADDR_WIDTH                 9
 #define PRI_PMMS_ADDR_WIDTH                  14