gpu: nvgpu: add GPC parity counters

(1) Re-arrange the structure for ecc counters reporting so multiple
units can be managed

(2) Add counters and handling for additional GPC counters

JIRA: GPUT19X-84

Change-Id: I74fd474d7daf7590fc7f7ddc9837bb692512d208
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1485277
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 0 insertions, 15 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h
index cf3842b6..9283a597 100644
--- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.h
@@ -35,21 +35,6 @@ enum {
         VOLTA_DMA_COPY_A        = 0xC3B5,
 };
 
-struct gr_t19x {
-        struct {
-                struct gr_gp10b_ecc_stat sm_l1_tag_corrected_err_count;
-                struct gr_gp10b_ecc_stat sm_l1_tag_uncorrected_err_count;
-                struct gr_gp10b_ecc_stat sm_cbu_corrected_err_count;
-                struct gr_gp10b_ecc_stat sm_cbu_uncorrected_err_count;
-                struct gr_gp10b_ecc_stat sm_l1_data_corrected_err_count;
-                struct gr_gp10b_ecc_stat sm_l1_data_uncorrected_err_count;
-                struct gr_gp10b_ecc_stat sm_icache_corrected_err_count;
-                struct gr_gp10b_ecc_stat sm_icache_uncorrected_err_count;
-                struct gr_gp10b_ecc_stat gcc_l15_corrected_err_count;
-                struct gr_gp10b_ecc_stat gcc_l15_uncorrected_err_count;
-        } ecc_stats;
-};
-
 #define NVC397_SET_SHADER_EXCEPTIONS            0x1528
 #define NVC397_SET_CIRCULAR_BUFFER_SIZE         0x1280
 #define NVC397_SET_ALPHA_CIRCULAR_BUFFER_SIZE   0x02dc